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參數(shù)資料
| 型號： | SN74LVC125ADRE4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVC/LCX/Z SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14 |
| 封裝： | GREEN, PLASTIC, MS-012AB, SOIC-14 |
| 文件頁數(shù)： | 14/20頁 |
| 文件大小： | 725K |
| 代理商： | SN74LVC125ADRE4 |
www.ti.com
SCAS290P – JANUARY 1993 – REVISED OCTOBER 2010
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range
–0.5
6.5
V
VI
Input voltage range(2)
–0.5
6.5
V
VO
Output voltage range(2) (3)
–0.5
VCC + 0.5
V
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
Continuous current through VCC or GND
±100
mA
D package(4)
86
DB package(4)
96
qJA
Package thermal impedance
NS package(4)
76
°C/W
PW package(4)
113
RGY package(5)
47
Tstg
Storage temperature range
–65
150
°C
Ptot
Power dissipation
TA = –40°C to 125°C
(6) (7)
500
mW
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3)
The value of VCC is provided in the recommended operating conditions table.
(4)
The package thermal impedance is calculated in accordance with JESD 51-7.
(5)
The package thermal impedance is calculated in accordance with JESD 51-5.
(6)
For the D package: above 70°C, the value of Ptot derates linearly with 8 mW/K.
(7)
For the DB, NS, and PW packages: above 60°C, the value of Ptot derates linearly with 5.5 mW/K.
Recommended Operating Conditions
(1)
TA = 25°C
–40°C to 85°C
–40°C to 125°C
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
Operating
1.65
3.6
1.65
3.6
1.65
3.6
VCC
Supply voltage
V
Data retention only
1.5
VCC = 1.65 V to 1.95 V
0.65 × VCC
High-level
VIH
VCC = 2.3 V to 2.7 V
1.7
V
input voltage
VCC = 2.7 V to 3.6 V
2
VCC = 1.65 V to 1.95 V
0.35 × VCC
Low-level
VIL
VCC = 2.3 V to 2.7 V
0.7
V
input voltage
VCC = 2.7 V to 3.6 V
0.8
VI
Input voltage
0
5.5
0
5.5
0
5.5
V
VO
Output voltage
0
VCC
0
VCC
0
VCC
V
VCC = 1.65 V
–4
VCC = 2.3 V
–8
High-level
IOH
mA
output current
VCC = 2.7 V
–12
VCC = 3 V
–24
VCC = 1.65 V
4
VCC = 2.3 V
8
Low-level
IOL
mA
output current
VCC = 2.7 V
12
VCC = 3 V
24
Δt/Δv
Input transition rise or fall rate
8
ns/V
(1)
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Copyright 1993–2010, Texas Instruments Incorporated
3
Product Folder Link(s): SN74LVC125A
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| SN74LVC125ADTE4 | 功能描述:緩沖器和線路驅(qū)動器 Quad Bus Buffer Gate With 3-State Outputs RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
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