參數(shù)資料
型號(hào)： SN74LV74ARGYR
廠商： TEXAS INSTRUMENTS INC
元件分類： 鎖存器
英文描述： LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC14
封裝： GREEN, PLASTIC, MO-241BA, QFN-14
文件頁(yè)數(shù)： 18/22頁(yè)
文件大小： 808K
代理商： SN74LV74ARGYR
SN54LV74A, SN74LV74A
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
SCLS381L AUGUST 1997 REVISED APRIL 2005
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V
(unless otherwise noted) (see Figure 1)
PARAMETER
TA = 25°C
SN54LV74A
SN74LV74A
UNIT
PARAMETER
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
t
Pulse duration
PRE or CLR low
8
9
ns
tw
Pulse duration
CLK
8
9
ns
t
Setup time before CLK
↑
Data
8
9
ns
tsu
Setup time before CLK
↑
PRE or CLR inactive
7
ns
th
Hold time, data after CLK
↑
0.5
ns
timing requirements over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V
(unless otherwise noted) (see Figure 1)
PARAMETER
TA = 25°C
SN54LV74A
SN74LV74A
UNIT
PARAMETER
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
t
Pulse duration
PRE or CLR low
6
7
ns
tw
Pulse duration
CLK
6
7
ns
t
Setup time before CLK
↑
Data
6
7
ns
tsu
Setup time before CLK
↑
PRE or CLR inactive
5
ns
th
Hold time, data after CLK
↑
0.5
ns
timing requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V
(unless otherwise noted) (see Figure 1)
PARAMETER
TA = 25°C
SN54LV74A
SN74LV74A
UNIT
PARAMETER
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
t
Pulse duration
PRE or CLR low
5
ns
tw
Pulse duration
CLK
5
ns
t
Setup time before CLK
↑
Data
5
ns
tsu
Setup time before CLK
↑
PRE or CLR inactive
3
ns
th
Hold time, data after CLK
↑
0.5
ns
switching
characteristics
over
recommended
operating
free-air
temperature
range,
VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
LOAD
TA = 25°C
SN54LV74A
SN74LV74A
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
f
CL = 15 pF
50*
100*
40*
40
MHz
fmax
CL = 50 pF
30
70
25
MHz
t
PRE or CLR
QQ
C
15 pF
9.8*
14.8*
1*
17*
1
17
ns
tpd
CLK
Q or Q
CL = 15 pF
11.1*
16.4*
1*
19*
1
19
ns
t
PRE or CLR
QorQ
C =50pF
13
17.4
1
20
1
20
ns
tpd
CLK
Q or Q
CL = 50 pF
14.2
20
1
23
1
23
ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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參數(shù)描述
SN74LV74ARGYRG4 功能描述:觸發(fā)器 Dual Pos Edge Trgerd DType FlipFlops RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
SN74LV74DBR 制造商:Texas Instruments 功能描述:
SN74LV74DR 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述:
SN74LV8138PW-P 制造商:Texas Instruments 功能描述:
SN74LV8139PW-P 制造商:Texas Instruments 功能描述:
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