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參數(shù)資料
| 型號： | SN74LV595ANSE4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 計數(shù)移位寄存器 |
| 英文描述： | LV/LV-A/LVX/H SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
| 封裝： | PLASTIC, SO-16 |
| 文件頁數(shù)： | 12/13頁 |
| 文件大?。?/td> | 208K |
| 代理商： | SN74LV595ANSE4 |
SN54LV595A, SN74LV595A
8-BIT SHIFT REGISTERS
WITH 3-STATE OUTPUT REGISTERS
SCLS414E – APRIL 1998 – REVISED MAY 2000
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V
(unless otherwise noted) (see Figure 1)
TA = 25°C
SN54LV595A
SN74LV595A
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
SRCLK high or low
5.5
tw
Pulse duration
RCLK high or low
5.5
ns
SRCLR low
5
SER before SRCLK
↑
3.5
t
Setup time
SRCLK
↑ before RCLK↑
8
8.5
ns
tsu
Setup time
SRCLR low before RCLK
↑
8
9
ns
SRCLR high (inactive) before SRCLK
↑
3
th
Hold time
SER after SRCLK
↑
1.5
ns
This setup time allows the storage register to receive stable data from the shift register. The clocks can be tied together, in which case the shift
register is one clock pulse ahead of the storage register.
timing requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V
(unless otherwise noted) (see Figure 1)
TA = 25°C
SN54LV595A
SN74LV595A
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
SRCLK high or low
5
tw
Pulse duration
RCLK high or low
5
ns
SRCLR low
5.2
SER before SRCLK
↑
3
t
Setup time
SRCLK
↑ before RCLK↑
5
ns
tsu
Setup time
SRCLR low before RCLK
↑
5
ns
SRCLR high (inactive) before SRCLK
↑
2.5
th
Hold time
SER after SRCLK
↑
2
ns
This setup time allows the storage register to receive stable data from the shift register. The clocks can be tied together, in which case the shift
register is one clock pulse ahead of the storage register.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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PDF描述 |
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| SN54LV595AW | LV/LV-A/LVX/H SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDFP16 |
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| SNJ54LV74AJ | LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14 |
| SN74LV74APWE4 | LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 |
| SN74LV74ADRG4 | LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74LV595ANSR | 功能描述:計數(shù)器移位寄存器 8-Bit Shift Register RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| SN74LV595ANSRE4 | 功能描述:計數(shù)器移位寄存器 8-Bit Shift Register RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| SN74LV595ANSRG4 | 功能描述:計數(shù)器移位寄存器 8B Shift Registr RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| SN74LV595APW | 制造商:Texas Instruments 功能描述: |
| SN74LV595APWG4 | 功能描述:寄存器 8-Bit Shift Register RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
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