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| 型號(hào)： | SN74LV594ADB |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 計(jì)數(shù)移位寄存器 |
| 英文描述： | LV/LV-A/LVX/H SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
| 封裝： | TSSOP-16 |
| 文件頁(yè)數(shù)： | 8/11頁(yè) |
| 文件大?。?/td> | 185K |
| 代理商： | SN74LV594ADB |
SN54LV594A, SN74LV594A
8-BIT SHIFT REGISTERS
WITH OUTPUT REGISTERS
SCLS413B – APRIL 1998 – REVISED SEPTEMBER 1999
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
V
SN54LV594A
SN74LV594A
UNIT
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
IOH = –50 A
2 V to 5.5 V
VCC–0.1
VOH
IOH = –2 mA
2.3 V
2
V
VOH
IOH = –6 mA
3 V
2.48
V
IOH = –12 mA
4.5 V
3.8
IOL = 50 A
2 V to 5.5 V
0.1
VOL
IOL = 2 mA
2.3 V
0.4
V
VOL
IOL = 6 mA
3 V
0.44
V
IOL = 12 mA
4.5 V
0.55
II
VI = VCC or GND
5.5 V
±1
A
ICC
VI = VCC or GND,
IO = 0
5.5 V
20
A
Ioff
VI or VO = 0 to 5.5 V
0 V
5
A
Ci
VI =VCC or GND
3.3 V
3.5
pF
Ci
VI = VCC or GND
5 V
2
pF
timing requirements over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V
(unless otherwise noted) (see Figure 1)
TA = 25°C
SN54LV594A
SN74LV594A
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
t
Pulse duration
RCLK or SRCLK high or low
7
7.5
ns
tw
Pulse duration
RCLR or SRCLR low
6
6.5
ns
SER before SRCLK
↑
2.5
3
SRCLK
↑ before RCLK↑
8
9
tsu
Setup time
SRCLR low before RCLK
↑
8.5
9.5
ns
SRCLR high (inactive) before SRCLK
↑
6
6.8
RCLR high (inactive) before RCLK
↑
6.7
7.6
th
Hold time
SER after SRCLK
↑
1.5
ns
This setup time ensures the output register sees stable data from the shift-register outputs. The clocks can be tied together, in which case the
shift register is one clock pulse ahead of the storage register.
timing requirements over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V
(unless otherwise noted) (see Figure 1)
TA = 25°C
SN54LV594A
SN74LV594A
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
t
Pulse duration
RCLK or SRCLK high or low
5.5
ns
tw
Pulse duration
RCLR or SRCLR low
5
ns
SER before SRCLK
↑
3.5
SRCLK
↑ before RCLK↑
8
8.5
tsu
Setup time
SRCLR low before RCLK
↑
8
9
ns
SRCLR high (inactive) before SRCLK
↑
4.2
4.8
RCLR high (inactive) before RCLK
↑
4.6
5.3
th
Hold time
SER after SRCLK
↑
1.5
ns
This setup time ensures the output register sees stable data from the shift-register outputs. The clocks can be tied together, in which case the
shift register is one clock pulse ahead of the storage register.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74LV594ADBR | 功能描述:計(jì)數(shù)器移位寄存器 8-Bit w/Output Reg RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| SN74LV594ADBRE4 | 功能描述:計(jì)數(shù)器移位寄存器 8-Bit Shift Register w/Output Registers RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| SN74LV594ADBRG4 | 功能描述:計(jì)數(shù)器移位寄存器 8B Shift Registr RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| SN74LV594ADE4 | 功能描述:計(jì)數(shù)器移位寄存器 8-Bit Shift Register w/Output Registers RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| SN74LV594ADG4 | 功能描述:計(jì)數(shù)器移位寄存器 8B Shift Registr RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
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