參數(shù)資料
型號: SN74LV573ADBLE
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
封裝: PLASTIC, SSOP-20
文件頁數(shù): 3/12頁
文件大?。?/td> 209K
代理商: SN74LV573ADBLE
taken low, the Q outputs are latched at the logic levels set up at the D inputs.
A buffered output-enable (OE\) input can be used to place the eight outputs in either a normal
logic state (high or low logic levels) or high-impedance state. In the high-impedance state, the
outputs neither load nor drive the bus lines significantly. The high-impedance state and
increased drive provide the capability to drive bus lines without need for interface or pullup
components.
OE\ does not affect the internal operations of the latches. Old data can be retained or new
data can be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to
V
CC
through a pullup resistor; the minimum value of the resistor is determined by the current-
sinking capability of the driver.
The SN54LV573A is characterized for operation over the full military temperature range of -
55°C to 125°C.
The SN74LV573A is characterized for operation from -40°C to 85°C.
To view the following documents, Acrobat Reader 3.x is required.
To download a document to your hard drive, right-click on the link and choose 'Save'.
Full datasheet in Acrobat PDF: scls411c.pdf (157 KB) (Updated: 05/25/2000)
Full datasheet in Zipped PostScript: scls411c.psz (159 KB)
View Application Reports for Digital Logic
l CMOS Power Consumption and CPD Calculation (SCAA035B -
Updated: 06/01/1997)
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Implications of Slow or Floating CMOS Inputs (SCBA004C - Updated: 02/01/1998)
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Input and Output Characteristics of Digital Integrated Circuits (SDYA010 - Updated:
10/01/1996)
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Live Insertion (SDYA012 - Updated: 10/01/1996)
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Understanding Advanced Bus-Interface Products Design Guide (SCAA029, 253 KB -
Updated: 05/01/1996
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Documentation Rules (SAP) And Ordering Information (SZZU001B, 4 KB - Updated:
05/06/1999)
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Logic Selection Guide Second Half 2000 (SDYU001N, 5035 KB - Updated: 04/17/2000)
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MicroStar Junior BGA Design Summary (SCET004, 167 KB - Updated: 07/28/2000)
l More Power In Less Space - Technical Article (SCAU001A, 850 KB -
Updated: 03/01/1996)
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相關(guān)PDF資料
PDF描述
SN74LV573APWRE4 LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
SN74LV573AGQNR LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PBGA20
SN74LV573ADBR LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
SNJ54LV573AJ LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20
SN74LV573ATDGVRG4 LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SN74LV573ADBR 功能描述:閉鎖 Tri-St Octal D-Type RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
SN74LV573ADBRE4 功能描述:閉鎖 Tri-St Octal D-Type RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
SN74LV573ADBRG4 功能描述:閉鎖 Octal Transp DType 閉鎖 RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
SN74LV573ADGVR 功能描述:閉鎖 Octal Transp DType 閉鎖 RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
SN74LV573ADGVRE4 功能描述:閉鎖 Octal Transp DType 閉鎖 RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel