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參數(shù)資料
| 型號： | SN74LV4040ADBLE |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 計(jì)數(shù)器 |
| 英文描述： | LV/LV-A/LVX/H SERIES, ASYN NEGATIVE EDGE TRIGGERED 12-BIT UP BINARY COUNTER, PDSO16 |
| 封裝： | SSOP-16 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 246K |
| 代理商： | SN74LV4040ADBLE |
SN54LV4040A, SN74LV4040A
12-BIT ASYNCHRONOUS BINARY COUNTERS
SCES226B – APRIL 1999 – REVISED MAY 2000
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (see Note 4)
SN54LV4040A
SN74LV4040A
UNIT
MIN
MAX
MIN
MAX
UNIT
VCC
Supply voltage
2
5.5
2
5.5
V
VCC = 2 V
1.5
VIH
High level input voltage
VCC = 2.3 V to 2.7 V
VCC × 0.7
V
VIH
High-level input voltage
VCC = 3 V to 3.6 V
VCC × 0.7
V
VCC = 4.5 V to 5.5 V
VCC × 0.7
VCC = 2 V
0.5
VIL
Low level input voltage
VCC = 2.3 V to 2.7 V
VCC × 0.3
V
VIL
Low-level input voltage
VCC = 3 V to 3.6 V
VCC × 0.3
V
VCC = 4.5 V to 5.5 V
VCC × 0.3
VI
Input voltage
0
5.5
0
5.5
V
VO
Output voltage
0
VCC
0
VCC
V
VCC = 2 V
–50
A
IOH
High level output current
VCC = 2.3 V to 2.7 V
–2
IOH
High-level output current
VCC = 3 V to 3.6 V
–6
mA
VCC = 4.5 V to 5.5 V
–12
VCC = 2 V
50
A
IOL
Low level output current
VCC = 2.3 V to 2.7 V
2
IOL
Low-level output current
VCC = 3 V to 3.6 V
6
mA
VCC = 4.5 V to 5.5 V
12
VCC = 2.3 V to 2.7 V
0
200
0
200
t/v
Input transition rise or fall rate
VCC = 3 V to 3.6 V
0
100
0
100
ns/V
VCC = 4.5 V to 5.5 V
0
20
0
20
TA
Operating free-air temperature
–55
125
–40
85
°C
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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