參數(shù)資料
型號(hào)： SN74LV165APWT
廠商： TEXAS INSTRUMENTS INC
元件分類： 計(jì)數(shù)移位寄存器
英文描述： LV/LV-A/LVX/H SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PDSO16
封裝： GREEN, PLASTIC, TSSOP-16
文件頁(yè)數(shù)： 23/32頁(yè)
文件大?。?/td> 821K
代理商： SN74LV165APWT
SN54LV165A, SN74LV165A
PARALLEL-LOAD 8-BIT SHIFT REGISTERS
SCLS402M APRIL 1998 REVISED DECEMBER 2010
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
Clocking is accomplished by a low-to-high transition of the clock (CLK) input while SH/LD is held high and clock
inhibit (CLK INH) is held low. The functions of CLK and CLK INH are interchangeable. Since a low CLK and a
low-to-high transition of CLK INH accomplishes clocking, CLK INH should be changed to the high level only
while CLK is high. Parallel loading is inhibited when SH/LD is held high. The parallel inputs to the register are
enabled while SH/LD is held low, independently of the levels of CLK, CLK INH, or SER.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
FUNCTION TABLE
INPUTS
OPERATION
SH/ LD
CLK
CLK INH
OPERATION
L
X
Parallel load
H
HX
Q0
H
XH
Q0
H
L
↑
Shift
H
↑
L
Shift
logic diagram (positive logic)
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
1
15
2
10
SH/LD
CLK INH
CLK
SER
9
7
QH
11
12
13
14
3
4
5
6
AB
C
D
E
F
G
H
Pin numbers shown are for the D, DB, DGV, J, NS, PW, RGY, and W packages.
相關(guān)PDF資料
PDF描述
SNJ54LV165AFK LV/LV-A/LVX/H SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, CQCC20
SN74LV166ADBE4 LV/LV-A/LVX/H SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16
SN74LV166APWRE4 LV/LV-A/LVX/H SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16
SNJ54LV166AW LV/LV-A/LVX/H SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, CDFP16
SN74LV166APWT LV/LV-A/LVX/H SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SN74LV165APWTE4 功能描述:計(jì)數(shù)器移位寄存器 Parallel-Load 8-Bit Shift Register RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel
SN74LV165APWTG4 功能描述:計(jì)數(shù)器移位寄存器 Parallel Load 8B Shift Registers RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel
SN74LV165ARGYR 功能描述:計(jì)數(shù)器移位寄存器 8-Bit Parallel Load RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel
SN74LV165ARGYRG4 功能描述:計(jì)數(shù)器移位寄存器 Parallel-Load 8-Bit Shift Register RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel
SN74LV165D 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述:
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