參數(shù)資料
型號(hào): SN74LS181N
廠商: MOTOROLA INC
元件分類(lèi): 通用總線(xiàn)功能
英文描述: 4-BIT ARITHMETIC LOGIC UNIT
中文描述: LS SERIES, 4-BIT ARITHMETIC LOGIC UNIT, PDIP24
封裝: PLASTIC, DIP-24
文件頁(yè)數(shù): 7/9頁(yè)
文件大小: 277K
代理商: SN74LS181N
5-338
FAST AND LS TTL DATA
SN54/74LS181
DIFF MODE TEST TABLE II
FUNCTION INPUTS:
S1 = S2 = 4.5 V, S0 = S3 = M = 0 V
Parameter
Test
Other Input
Same Bit
Other Data Inputs
Test
Input
Under
Apply
4.5 V
Apply
GND
Apply
4.5 V
Apply
GND
Output
Under
tPLH
tPHL
A
None
B
Remaining
A
Remaining
B, Cn
Fl
tPLH
tPHL
B
A
None
Remaining
A
Remaining
B, Cn
Fl
tPLH
tPHL
Al
None
Bl
Remaining
B, Cn
Remaining
A
Fl+1
tPLH
tPHL
Bl
Al
None
Remaining
B, Cn
Remaining
A
Fl+1
tPLH
tPHL
A
None
B
None
Remaining
A and B, Cn
P
tPLH
tPHL
B
A
None
None
Remaining
A and B, Cn
P
tPLH
tPHL
A
B
None
None
Remaining
A and Bl, Cn
G
tPLH
tPHL
B
None
A
None
Remaining
A and B, Cn
G
tPLH
tPHL
A
None
B
Remaining
A
Remaining
B, Cn
A = B
tPLH
tPHL
B
A
None
Remaining
A
Remaining
B, Cn
A = B
tPLH
tPHL
A
B
None
None
Remaining
A and B, Cn
cn+4
tPLH
tPHL
B
None
A
None
Remaining
A and B, Cn
Cn+4
tPLH
tPHL
Cn
None
None
All
A and B
None
Cn+4
LOGIC MODE TEST TABLE III
Parameter
Test
Other Input
Same Bit
Other Data Inputs
Test
Function Inputs
Input
Under
Apply
4.5 V
Apply
GND
Apply
4.5 V
Apply
GND
Output
Under
tPLH
tPHL
A
None
B
None
Remaining
A and B, Cn
Any F
S1 = S2 = M = 4.5 V
S0 = S3 = 0 V
tPLH
tPHL
B
None
A
None
Remaining
A and B, Cn
Any F
S1 = S2 = M = 4.5 V
S0 = S3 = 0 V
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