參數(shù)資料
型號(hào)： SN74CBTLV3125NSR
廠商： TEXAS INSTRUMENTS INC
元件分類： 總線收發(fā)器
英文描述： CBTLV/3B SERIES, 4-BIT DRIVER, TRUE OUTPUT, PDSO14
封裝： PLASTIC, SOP-14
文件頁數(shù)： 16/20頁
文件大?。?/td> 803K
代理商： SN74CBTLV3125NSR
SN74CBTLV3125
LOW VOLTAGE QUADRUPLE FET BUS SWITCH
SCDS037J DECEMBER 1997 REVISED OCTOBER 2003
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
PARAMETER MEASUREMENT INFORMATION
VCC/2
th
tsu
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
S1
2
× VCC
Open
GND
RL
Data Input
Timing Input
VCC
0 V
VCC
0 V
tw
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
tPLH
tPHL
tPLH
VOH
VOL
VCC
0 V
Input
Output
Waveform 1
S1 at 2
× VCC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
VCC
0 V
VOL + V
VOH V
≈0 V
VCC
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
2
× VCC
GND
TEST
S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤ 10 MHz, ZO = 50 , tr ≤ 2 ns, tf ≤ 2 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Output
Control
VCC/2
VCC
VCC/2
2.5 V
±0.2 V
3.3 V
±0.3 V
500
500
VCC
RL
0.15 V
0.3 V
V
CL
30 pF
50 pF
Figure 1. Load Circuit and Voltage Waveforms
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