參數(shù)資料
型號: SN74CB3Q16811DLR
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: CB3Q/3VH/3C/2B SERIES, DUAL 12-BIT DRIVER, TRUE OUTPUT, PDSO56
封裝: GREEN, PLASTIC, SSOP-56
文件頁數(shù): 5/12頁
文件大?。?/td> 310K
代理商: SN74CB3Q16811DLR
www.ti.com
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
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BIASV
1A1
1A2
1A3
1A4
1A5
1A6
GND
1A7
1A8
1A9
1A10
1A11
1A12
2A1
2A2
VCC
2A3
GND
2A4
2A5
2A6
2A7
2A8
2A9
2A10
2A11
2A12
1OE
2OE
1B1
1B2
1B3
1B4
1B5
GND
1B6
1B7
1B8
1B9
1B10
1B11
1B12
2B1
2B2
2B3
GND
2B4
2B5
2B6
2B7
2B8
2B9
2B10
2B11
2B12
SN74CB3Q16811
24-BIT SWITCH WITH PRECHARGED OUTPUTS
2.5-V/3.3-V LOW-VOLTAGE FET BUS SWITCH
SCDS153B – OCTOBER 2003 – REVISED MARCH 2005
During insertion (or removal) of a card into (or from) an active bus, the card's output voltage may be close to
GND. When the connector pins make contact, the card's parasitic capacitance tries to force the bus signal to
GND, creating a possible glitch on the active bus. This glitching effect can be reduced by using a bus switch with
precharged bias voltage (BIASV) of the bus switch equal to the input threshold voltage level of the receivers on
the active bus. This method ensures that any glitch produced by insertion (or removal) of the card does not cross
the input threshold region of the receivers on the active bus, minimizing the effects of live-insertion noise.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging
current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Table 1. FUNCTION TABLE
(EACH 12-BIT BUS SWITCH)
INPUT
INPUT/OUTPUT
FUNCTION
OE
A
L
B
A port = B port
Disconnect
H
Z
B port = BIASV
2
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