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參數(shù)資料
| 型號(hào)： | SN74AVC16831DBBR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類(lèi)： | 總線(xiàn)收發(fā)器 |
| 英文描述： | AVC SERIES, 9-BIT DRIVER, TRUE OUTPUT, PDSO80 |
| 封裝： | TVSOP-80 |
| 文件頁(yè)數(shù)： | 3/11頁(yè) |
| 文件大?。?/td> | 565K |
| 代理商： | SN74AVC16831DBBR |
SN74AVC16831
9-BIT 1-TO-4 ADDRESS REGISTER/DRIVER
WITH 3-STATE OUTPUTS
SCES179F – DECEMBER 1998 – REVISED FEBRUARY 2000
2–215
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VCC = 3.3 V ± 0.3 V
VOH
VOL
From Output
Under Test
CL = 30 pF
(see Note A)
LOAD CIRCUIT
S1
2
× VCC
Open
GND
500
500
tPLH
tPHL
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2
× VCC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
VCC
0 V
VOH
VOL
0 V
VOL + 0.3 V
VOH – 0.3 V
0 V
VCC
0 V
tw
Input
VCC
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Output
Input
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
2
× VCC
GND
TEST
S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤ 10 MHz, ZO = 50 , tr ≤ 2 ns, tf ≤ 2 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
VCC/2
th
tsu
VCC
0 V
VCC
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing
Input
Data
Input
VCC/2
Figure 5. Load Circuit and Voltage Waveforms
PRODUCT
PREVIEW
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