參數(shù)資料
型號: SN74AUP2G06DSFR
廠商: TEXAS INSTRUMENTS INC
元件分類: 門電路
英文描述: AUP/ULP/V SERIES, DUAL 1-INPUT INVERT GATE, PDSO6
封裝: GREEN, PLASTIC, MO-287X2AAF, SON-6
文件頁數(shù): 20/21頁
文件大?。?/td> 786K
代理商: SN74AUP2G06DSFR
VM
FromOutput
UnderTest
CL
(seeNote A)
LOADCIRCUIT
1M
VOLTAGEWAVEFORMS
PROPAGATIONDELAY TIMES
INVERTING ANDNONINVERTINGOUTPUTS
tPLH
tPHL
tPLH
VOH
VOL
VI
0V
Input
Output
VM
5,10,15,30pF
VCC/2
VCC
VCC =1.2V
± 0.1V
VCC =0.8V
VCC =1.5V
± 0.1V
VCC =1.8V
± 0.15V
VCC =2.5V
± 0.2V
VCC =3.3V
± 0.3V
5,10,15,30pF
VCC/2
VCC
5,10,15,30pF
VCC/2
VCC
5,10,15,30pF
VCC/2
VCC
CL
VM
VI
5,10,15,30pF
VCC/2
VCC
5,10,15,30pF
VCC/2
VCC
th
tsu
DataInput
TimingInput
VCC
0V
VCC
0V
tw
Input
VOLTAGEWAVEFORMS
SETUP ANDHOLDTIMES
VOLTAGEWAVEFORMS
PULSEDURATION
VCC/2
VCC
VCC/2
SCES776A – SEPTEMBER 2009 – REVISED MAY 2010
www.ti.com
PARAMETER MEASUREMENT INFORMATION
(Propagation Delays, Setup and Hold Times, and Pulse Width)
A.
CL includes probe and jig capacitance.
B.
Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output
control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the
output control.
C.
All input pulses are supplied by generators having the following characteristics: PRR
≤ 10 MHz, ZO = 50 , for
propagation delays tr/tf = 3 ns, for setup and hold times and pulse width tr/tf = 1.2 ns.
D.
The outputs are measured one at a time, with one transition per measurement.
E.
tPLH and tPHL are the same as tpd.
F.
All parameters and waveforms are not applicable to all devices.
Figure 3. Load Circuit and Voltage Waveforms
8
Copyright 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): SN74AUP2G06
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