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參數(shù)資料
| 型號： | SN74AUP1G34DCKT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 門電路 |
| 英文描述： | AUP/ULP/V SERIES, 1-INPUT NON-INVERT GATE, PDSO5 |
| 封裝： | GREEN, PLASTIC, SC-70, 5 PIN |
| 文件頁數(shù)： | 12/24頁 |
| 文件大?。?/td> | 1114K |
| 代理商： | SN74AUP1G34DCKT |
AUP
LVC
AUP
LVC
Static-PowerConsumption
( A)
Dynamic-PowerConsumption
(pF)
Single,dual,andtriplegates
3.3-V
Logic
3.3-V
Logic
0%
20%
40%
60%
80%
100%
0%
20%
40%
60%
80%
100%
-0.5
0
0.5
1
1.5
2
2.5
3
3.5
0
5
10
15
20
25
30
35
40
45
Time-ns
V
o
lt
a
g
e
-
V
AUP1G08dataatCL =15pF
SwitchingCharacteristics
at25MHz
Output
Input
A
Y
2
4
A
Y
1
3
SCES603G – AUGUST 2004 – REVISED MARCH 2010
www.ti.com
Figure 1. AUP – The Lowest-Power Family
Figure 2. Excellent Signal Integrity
This single buffer gate performs the Boolean function Y = A in positive logic.
NanoStar package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION(1)
ORDERABLE
TOP-SIDE
TA
PACKAGE(2)
PART NUMBER
MARKING(3)
NanoStar – WCSP (DSBGA)
Reel of 3000
SN74AUP1G34YFPR
_ _ _H9_
0.23-mm Large Bump – YFP
NanoStar – WCSP (DSBGA)
Reel of 3000
SN74AUP1G34YZPR
_ _ _H9_
0.23-mm Large Bump – YZP (Pb-free)
QFN – DRY
Reel of 5000
SN74AUP1G34DRYR
H9
–40°C to 85°C
uQFN – DSF
Reel of 5000
SN74AUP1G34DSFR
H9
SOT (SOT-23) – DBV
Reel of 3000
SN74AUP1G34DBVR
H34_
SOT (SC-70) – DCK
Reel of 3000
SN74AUP1G34DCKR
H9_
SOT (SOT-553) – DRL
Reel of 4000
SN74AUP1G34DRLR
H9_
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2)
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3)
DBV/DCK/DRL: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
YFP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).
FUNCTION TABLE
INPUT
OUTPUT
A
Y
H
L
LOGIC DIAGRAM (POSITIVE LOGIC)
(DBV, DCK, DRL, DRY, and YZP PACKAGES)
LOGIC DIAGRAM (POSITIVE LOGIC)
(YFP PACKAGE)
2
Copyright 2004–2010, Texas Instruments Incorporated
Product Folder Link(s): SN74AUP1G34
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74AUP1G34DCKTE4 | 功能描述:緩沖器和線路驅(qū)動器 Lo PWR SNGL Bufr Gate RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74AUP1G34DCKTG4 | 功能描述:緩沖器和線路驅(qū)動器 Lo PWR SNGL Bufr Gate RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74AUP1G34DPWR | 功能描述:Buffer, Non-Inverting 1 Element 1 Bit per Element Push-Pull Output 4-X2SON (0.80x0.80) 制造商:texas instruments 系列:74AUP 包裝:剪切帶（CT） 零件狀態(tài):有效 邏輯類型:緩沖器，非反向 元件數(shù):1 每元件位數(shù):1 輸入類型:- 輸出類型:推挽式 電流 - 輸出高，低:4mA，4mA 電壓 - 電源:0.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C（TA） 安裝類型:表面貼裝 封裝/外殼:4-XFDFN 裸露焊盤 供應(yīng)商器件封裝:4-X2SON（0.80x0.80） 標(biāo)準(zhǔn)包裝:1 |
| SN74AUP1G34DRLR | 功能描述:緩沖器和線路驅(qū)動器 LoPwrSnglBffrGt RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74AUP1G34DRLRG4 | 功能描述:緩沖器和線路驅(qū)動器 Lo PWR SNGL Bufr Gate RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
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