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參數(shù)資料
| 型號： | SN74AUC2G34YZAR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 門電路 |
| 英文描述： | AUC SERIES, DUAL 1-INPUT NON-INVERT GATE, PBGA6 |
| 封裝： | DSBGA-6 |
| 文件頁數(shù)： | 11/18頁 |
| 文件大?。?/td> | 614K |
| 代理商： | SN74AUC2G34YZAR |
www.ti.com
1A
1Y
1
6
2A
2Y
3
4
Absolute Maximum Ratings
(1)
SN74AUC2G34
DUAL BUFFER GATE
SCES514 – NOVEMBER 2003 – REVISED APRIL 2005
FUNCTION TABLE
(EACH GATE)
INPUT
OUTPUT
A
Y
H
L
LOGIC DIAGRAM (POSITIVE LOGIC)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range
–0.5
3.6
V
VI
Input voltage range(2)
–0.5
4.1
V
VO
Voltage range applied to any output in the high-impedance or power-off state(2)
–0.5
4.1
V
VO
Output voltage range(2)
–0.5
VCC + 0.5
V
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±20
mA
Continuous current through VCC or GND
±100
mA
DBV package
165
θ
JA
Package thermal impedance(3)
DCK package
259
°C/W
YEP/YZP package
123
Tstg
Storage temperature range
–65
150
°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3)
The package thermal impedance is calculated in accordance with JESD 51-7.
2
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