參數(shù)資料
型號(hào): SN74AS652-1DW
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: AS SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24
封裝: PLASTIC, SO-24
文件頁數(shù): 16/25頁
文件大小: 380K
代理商: SN74AS652-1DW
1 of 3
>> Semiconductor Home > Products > Digital Logic > Transceivers > Registered Transceivers >
SN54ALS653, OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE
OUTPUTS
Device Status: Active
Description
Products
Development Tools
Applications
Search
> Description
> Features
> Datasheets
> Pricing/Samples/Availability
> Application Notes
> Related Documents
Parameter Name SN54ALS653
Voltage Nodes (V) 5
Vcc range (V)
4.5 to 5.5
Input Level
TTL
Output Level
TTL
No. of Outputs
8
These devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry
arranged for multiplexed transmission of data directly from the data bus or from the internal
storage registers. Output-enable (OEAB and
) inputs are provided to control the
transceiver functions. Select-control (SAB and SBA) inputs are provided to select real-time
or stored data transfer. The circuitry used for select control eliminates the typical decoding
glitch that occurs in a multiplexer during the transition between stored and real-time data. A
low input level selects real-time data, and a high input level selects stored data. Figure 1
illustrates the four fundamental bus-management functions that can be performed with the
octal bus transceivers and registers.
Data on the A or B data bus, or both, can be stored in the internal D-type flip-flops by low-
to-high transitions at the appropriate clock (CLKAB or CLKBA) terminals, regardless of the
select- or output-control terminals. When SAB and SBA are in the real-time transfer mode, it
is possible to store data without using the internal D-type flip-flops by simultaneously
enabling OEAB and
. In this configuration, each output reinforces its input. When all
other data sources to the two sets of bus lines are at high impedance, each set of bus lines
remains at its last state.
The -1 versions of the SN74ALS651A and SN74ALS652A are identical to the standard
versions except that the recommended maximum I
OL for the -1 versions is increased to 48
相關(guān)PDF資料
PDF描述
SN74AS760N3 AS SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDIP20
SN74ALS760DWG4 ALS SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20
SN74AS805BNE4 AS SERIES, HEX 2-INPUT NOR GATE, PDIP20
SN74AS821ADWRG4 AS SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24
SN74AS823ADWRE4 AS SERIES, 9-BIT DRIVER, TRUE OUTPUT, PDSO24
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SN74AS652DW 功能描述:總線收發(fā)器 Octal Bus Trncvr/Reg W/3-State Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74AS652DWE4 功能描述:總線收發(fā)器 Octal Bus Trncvr/Reg W/3-State Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74AS652DWG4 功能描述:總線收發(fā)器 Octal Bus Trancvrs Regstrs RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74AS652DWR 功能描述:總線收發(fā)器 Octal Bus Trncvr/Reg W/3-State Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74AS652DWRE4 功能描述:總線收發(fā)器 Octal Bus Trncvr/Reg W/3-State Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel