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參數(shù)資料
| 型號： | SN74ACT16374EPDLR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ACT SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | 0.300 INCH, PLASTIC, SSOP-48 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 88K |
| 代理商： | SN74ACT16374EPDLR |
SN74ACT16374EP
16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOP
WITH 3-STATE OUTPUTS
SCAS679 – MAY 2002
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
D Extended Temperature Performance of
–40
°C to 125°C
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product Change Notification
D Qualification Pedigree
D Member of the Texas Instruments
Widebus
Family
D Inputs Are TTL-Voltage Compatible
D 3-State Bus Driving True Outputs
D Flow-Through Architecture Optimizes
PCB Layout
D Distributed VCC and GND Pins Minimize
High-Speed Switching Noise
D Packaged in Plastic 300-mil Shrink
Small-Outline (DL) Package Using 25-mil
Center-to-Center Pin Spacings
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, highly
accelerated stress test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life.
description
The SN74ACT16374EP is a 16-bit edge-triggered D-type flip-flop with 3-state outputs, designed specifically for
driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and working registers.
This device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK)
input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.
An output-enable (OE) input can be used to place the outputs in either a normal logic state (high or low logic
levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state provides the capability to drive bus lines in a bus-organized system,
without need for interface or pullup components. OE does not affect the internal operations of the flip-flop. Old
data can be retained or new data can be entered while the outputs are in the high-impedance state.
The SN74ACT16374EP is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count
and functionality of standard small-outline packages in the same printed circuit board area.
Copyright
2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
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1OE
1Q1
1Q2
GND
1Q3
1Q4
VCC
1Q5
1Q6
GND
1Q7
1Q8
2Q1
2Q2
GND
2Q3
2Q4
VCC
2Q5
2Q6
GND
2Q7
2Q8
2OE
1CLK
1D1
1D2
GND
1D3
1D4
VCC
1D5
1D6
GND
1D7
1D8
2D1
2D2
GND
2D3
2D4
VCC
2D5
2D6
GND
2D7
2D8
2CLK
DL PACKAGE
(TOP VIEW)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74ACT16374QDLR | 制造商:Texas Instruments 功能描述:EP AC/ACT QTEMP 16BIT DTYPE EDGE-TRIG FLIP-FLOP W/, UPSCREEN - Tape and Reel |
| SN74ACT16374QDLREP | 功能描述:觸發(fā)器 Mil Enhance 16B Edge-Trgrd Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74ACT16543DL | 制造商:Texas Instruments 功能描述:Bus Transceiver, Dual, 8 Bit, 56 Pin, Plastic, SSOP |
| SN74ACT16543DLR | 制造商:Texas Instruments 功能描述:Bus Transceiver, Dual, 8 Bit, 56 Pin, Plastic, SSOP |
| SN74ACT16827DL | 制造商:Texas Instruments 功能描述: |
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