參數(shù)資料
型號: SN74ABT821DBR
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: ABT SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24
封裝: PLASTIC, SSOP-24
文件頁數(shù): 1/7頁
文件大?。?/td> 121K
代理商: SN74ABT821DBR
SN54ABT821 . . . JT PACKAGE
SN74ABT821 . . . DB, DW, OR NT PACKAGE
(TOP VIEW)
SN54ABT821 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
OE
1D
2D
3D
4D
5D
6D
7D
8D
9D
10D
GND
VCC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
9Q
10Q
CLK
NC – No internal connection
32 1 28 27
12 13
5
6
7
8
9
10
11
25
24
23
22
21
20
19
3Q
4Q
5Q
NC
6Q
7Q
8Q
3D
4D
5D
NC
6D
7D
8D
426
14 15 16 17 18
9D
10D
GND
NC
CLK
10Q
9Q
2D
1D
OE
NC
1Q
2Q
V
C
SN54ABT821, SN74ABT821
10-BIT BUS-INTERFACE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCBS193A – FEBRUARY 1991 – REVISED JULY 1994
Copyright
1994, Texas Instruments Incorporated
2–1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
ESD Protection Exceeds 2000 V
Per MIL-STD-883C, Method 3015
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
Typical V
OLP (Output Ground Bounce)
< 1 V at VCC = 5 V, TA = 25°C
High-Drive Outputs (–32-mA I
OH,
64-mA IOL)
Package Options Include Plastic
Small-Outline (DW) and Shrink
Small-Outline (DB) Packages, Ceramic
Chip Carriers (FK), and Plastic (NT) and
Ceramic (JT) DIPs
description
These 10-bit flip-flops feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing wider buffer
registers, I/O ports, bidirectional bus drivers with
parity, and working registers.
The ten flip-flops are edge-triggered D-type
flip-flops. On the positive transition of the clock
(CLK) input, the device provides true data at the
Q outputs.
A buffered output-enable (OE) input can be used
to place the ten outputs in either a normal logic
state (high or low level) or a high-impedance state.
In the high-impedance state, the outputs neither
load nor drive the bus lines significantly. The
high-impedance state and increased drive provide
the capability to drive bus lines without need for
interface or pullup components.
OE does not affect the internal operations of the latch. Previously stored data can be retained or new data can
be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74ABT821 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54ABT821 is characterized for operation over the full military temperature range of – 55
°C to 125°C. The
SN74ABT821 is characterized for operation from – 40
°C to 85°C.
EPIC-
ΙΙB is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
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SN74ABT823DW 功能描述:觸發(fā)器 Tri-St 9bit Bus Int RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
SN74ABT823DWE4 功能描述:觸發(fā)器 9-Bit Bus-Interface F-F W/3-State Otpt RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
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