參數(shù)資料
型號(hào): SN74ABT245BMDBREP
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: ABT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20
封裝: GREEN, PLASTIC, SSOP-20
文件頁數(shù): 1/10頁
文件大小: 301K
代理商: SN74ABT245BMDBREP
SN74ABT245BEP
OCTAL BUS TRANSCEIVER
WITH 3STATE OUTPUTS
SCBS798 - FEBRUARY 2004
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Controlled Baseline
One Assembly/Test Site, One Fabrication
Site
D Extended Temperature Performance of
55
°C to 125°C
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product-Change Notification
D Qualification Pedigree
D Typical VOLP (Output Ground Bounce)
<1 V at VCC = 5 V, TA = 25°C
D Ioff and Power-Up 3-State Support Hot
Insertion
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
D High-Drive Outputs (24-mA IOH, 32-mA IOL)
D Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD 17
D ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
description/ordering information
This octal bus transceiver is designed for asynchronous communication between data buses. The device
transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are
effectively isolated.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the device when it is powered down. The
power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
55
°C to 125°C
SSOP DB
Tape and reel
SN74ABT245BMDBREP
ABT245MEP
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright
2004, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
DB PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
VCC
OE
B1
B2
B3
B4
B5
B6
B7
B8
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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