參數(shù)資料
型號: SN54LV125AJ
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: LV/LV-A/LVX/H SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, CDIP14
封裝: CERAMIC, DIP-14
文件頁數(shù): 1/7頁
文件大?。?/td> 129K
代理商: SN54LV125AJ
SN54LV125A, SN74LV125A
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCES124D – DECEMBER 1997 – REVISED JULY 1998
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D EPIC (Enhanced-Performance Implanted
CMOS) Process
D Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC, TA = 25°C
D Typical VOHV (Output VOH Undershoot)
> 2 V at VCC, TA = 25°C
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Package Options Include Plastic
Small-Outline (D, NS), Shrink Small-Outline
(DB), Thin Very Small-Outline (DGV), and
Thin Shrink Small-Outline (PW) Packages,
Ceramic Flat (W) Packages, Chip Carriers
(FK), and DIPs (J)
description
The ‘LV125A quadruple bus buffer gates are
designed for 2-V to 5.5-V VCC operation.
These devices feature independent line drivers
with 3-state outputs. Each output is disabled when
the associated output-enable (OE) input is high.
To ensure the high-impedance state during power
up or power down, OE should be tied to VCC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
The SN54LV125A is characterized for operation over the full military temperature range of –55
°C to 125°C. The
SN74LV125A is characterized for operation from –40
°C to 85°C.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
OE
A
Y
L
H
L
LL
H
X
Z
Copyright
1998, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OE
1A
1Y
2OE
2A
2Y
GND
VCC
4OE
4A
4Y
3OE
3A
3Y
SN54LV125A ...J OR W PACKAGE
SN74LV125A . . . D, DB, DGV, NS, OR PW PACKAGE
(TOP VIEW)
32 1 20 19
910 11 1213
4
5
6
7
8
18
17
16
15
14
4A
NC
4Y
NC
3OE
1Y
NC
2OE
NC
2A
1A
1OE
NC
3Y
3A
V
4OE
2Y
GND
NC
SN54LV125A . . . FK PACKAGE
(TOP VIEW)
CC
NC – No internal connection
EPIC is a trademark of Texas Instruments Incorporated.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
相關(guān)PDF資料
PDF描述
SN54LV126ADR LV/LV-A/LVX/H SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14
SN74LV126AJ LV/LV-A/LVX/H SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, CDIP14
SN54LV132AFK LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, CQCC20
SN54LV139AJ LV/LV-A/LVX/H SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDIP16
SN74LV139ADBLE LV/LV-A/LVX/H SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16
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