參數(shù)資料
型號： SN54LS569J
廠商： MOTOROLA INC
元件分類： 通用總線功能
英文描述： FOUR-BIT UP/DOWN COUNTER WITH THREE-STATE OUTPUTS
中文描述： LS SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, CDIP20
封裝： CERAMIC, DIP-20
文件頁數(shù)： 2/8頁
文件大小： 260K
代理商： SN54LS569J
5-574
FAST AND LS TTL DATA
SN54/74LS569A
FUNCTION TABLE
INPUTS
OUTPUTS
CP
D
C
B
A
LOAD
CET
CEP
U/D
ACLR
SCLR
OE
RCO
CCO
YD
YC
YB
YA
↑
↑
↑
↑
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
H
H
H
H
L
L
H
L
L
L
X
H
H
L
X
X
H
H
H
H
H
H
H
H
L
L
L
L
A/R
A/R
H
A/R
A/R
A/R
H
H
(QT – CP) + 1
(QT – CP) – 1
NC
NC
Count Up
Count Down
Count Inhibit
Count Inhibit
NC
NC
NC
NC
NC
NC
↑
↑
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
L
H
L
L
H
L
H
X
L
H
X
H
H
H
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
L
L
H
H
H
H
L
L
L
H
H
H
L
L
L
H
H
H
L
L
L
H
H
H
L
L
L
Overflow
Overflow
Overflow Inhibit
Underflow
Underflow
Underflow Inhibit
H
H
↑
↑
H
H
↑
↑
L
X
X
X
X
X
X
X
X
X
H
X
X
X
X
X
X
X
X
X
L
X
X
X
X
X
X
X
X
X
H
X
X
X
X
X
X
X
X
X
L
X
X
X
X
X
X
X
X
X
X
H
L
L
H
X
L
L
H
X
X
X
L
H
X
X
L
H
X
X
X
H
L
L
L
H
L
L
L
X
H
H
H
H
H
L
L
L
L
X
H
L
L
L
L
X
X
X
X
X
L
L
L
L
L
L
L
L
L
H
H
H
L
L
H
H
L
L
H
X
H
H
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
Load Example
Clear (Synchronous)
Clear (Synchronous)
Clear (Synchronous)
Clear (Synchronous)
Asynchronous Clear
Asynchronous Clear
Asynchronous Clear
Asynchronous Clear
Output Disabled
↑
↑
X
H
H
H
X
X
X
H
H
X
Hi-Z
(QT — CP) = Output state prior to clock edge
NC = No change
A/R = Assumes required output state;
High except during Overflow and Underflow
X = Don’t care
LOGIC DIAGRAM
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