參數(shù)資料
型號(hào): SN54LS395
廠商: Motorola, Inc.
英文描述: 4-BIT SHIFT REGISTER WITH 3-STATE OUTPUTS
中文描述: 4位移位寄存器具有三態(tài)輸出
文件頁(yè)數(shù): 2/6頁(yè)
文件大?。?/td> 196K
代理商: SN54LS395
5-552
FAST AND LS TTL DATA
SN74LS395
LOGIC DIAGRAM
FUNCTION DESCRIPTION
The SN74LS395 contains four D-type edge-triggered
flip-flops and auxiliary gating to select a D input either from a
Parallel (Pn) input or from the preceding stage. When the
Select input is HIGH, the Pn inputs are enabled. A LOW signal
on the S input enables the serial inputs for shift-right opera-
tions, as indicated in the Truth Table.
State changes are initiated by HIGH-to-LOW transitions on
the Clock Pulse (CP) input. Signals on the Pn, Ds and S inputs
can change when the Clock is in either state, provided that the
recommended set-up and hold times are observed. When the
S input is LOW, a CP HIGH-LOW transition transfers data in
Q0 to Q1, Q1 to Q2, and Q2 to Q3. A left-shift is accomplished
by connecting the outputs back to the Pn inputs, but offset one
place to the left, i.e., O3 to P2, O2 to P1 and O1 to P0, with P3
acting as the linking input from another package.
When the OE input is HIGH, the output buffers are disabled
and the Q0–Q3 outputs are in a high impedance condition.
The shifting, parallel loading or resetting operations can still be
accomplished, however.
MODE SELECT — TRUTH TABLE
Inputs @ tn
S
Outputs @ tn+1
O2
L
O1n
O1n
P2
Operating Mode
MR
CP
Ds
X
H
Pn
X
X
O0
L
H
O1
L
O0n
O0n
P1
O3
L
O2n
O2n
P3
Asynchronous Reset
Shift, SET First Stage
L
H
X
X
L
Shift, RESET First Stage
Parallel Load
H
H
L
H
L
X
X
Pn
L
P0
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
tn, n + 1 = time before and after CP HIGH-to-LOW transition
NOTE:
When OE is HIGH, outputs O0–O3 are in the high impedance state; however, this does not affect other operations or the Q3 output.
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min
Typ
Max
Unit
VCC
TA
IOH
IOL
Supply Voltage
4.75
5.0
5.25
V
Operating Ambient Temperature Range
0
25
70
°
C
Output Current — High
–0.4
mA
Output Current — Low
8.0
mA
相關(guān)PDF資料
PDF描述
SN74LS395D 4-BIT SHIFT REGISTER WITH 3-STATE OUTPUTS
SN74LS395J 4-BIT SHIFT REGISTER WITH 3-STATE OUTPUTS
SN74LS395N 4-BIT SHIFT REGISTER WITH 3-STATE OUTPUTS
SN54LS641J Octal D-Type Flip-Flop with 3-State Outputs; Package: SOEIAJ-20; No of Pins: 20; Container: Rail; Qty per Container: 40
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