參數(shù)資料
型號(hào)： SN54ALS842JT
廠商： TEXAS INSTRUMENTS INC
元件分類： 總線收發(fā)器
英文描述： ALS SERIES, 10-BIT DRIVER, INVERTED OUTPUT, CDIP24
封裝： 0.300 INCH, CERAMIC, DIP-24
文件頁(yè)數(shù)： 2/11頁(yè)
文件大?。?/td> 141K
代理商： SN54ALS842JT
SN54AS841, SN54AS842, SN74AS841, SN54AS842
10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B – D2910, DECEMBER 1983 – REVISED MAY 1986
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
10
’AS841 switching characteristics (see Note 1)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500
,
PARAMETER
FROM
TO
R2 = 500
,
UNIT
PARAMETER
(INPUT)
(OUTPUT)
TA = MIN to MAX
UNIT
SN54AS841
SN74AS841
MIN
MAX
MIN
MAX
tPLH
D
Q
1
8.5
1
6.5
ns
tPHL
D
Q
1
10
1
9
ns
tPLH
C
Q
2
13
2
12
ns
tPHL
C
Q
2
13
2
12
ns
tPZH
OC
Q
2
13.5
2
10.5
ns
tPZL
OC
Q
2
15
2
13.5
ns
tPHZ
OC
Q
1
10
1
8
ns
tPLZ
OC
Q
1
10
1
8
ns
’AS842 switching characteristics (see Note 1)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
FROM
TO
R1 = 500
,
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
R2 = 500
,
UNIT
(INPUT)
(OUTPUT)
TA = MIN to MAX
SN54AS842
SN74AS842
MIN
MAX
MIN
MAX
tPLH
D
Q
1
11
1
8.5
ns
tPHL
D
Q
1
10
1
9
ns
tPLH
C
Q
2
13
2
12
ns
tPHL
C
Q
2
13
2
12
ns
tPZH
OC
Q
2
14.5
2
12
ns
tPZL
OC
Q
2
15
2
12.5
ns
tPHZ
OC
Q
1
10
1
8
ns
tPLZ
OC
Q
1
10
1
8
ns
The conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 1: Load circuit and voltage waveforms are shown in Section 1.
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