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參數(shù)資料
| 型號： | SN54ALS653-1FK |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CQCC28 |
| 封裝： | CERAMIC, LCC-28 |
| 文件頁數(shù)： | 17/22頁 |
| 文件大?。?/td> | 331K |
| 代理商： | SN54ALS653-1FK |
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCTOBER 1996
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
FUNCTION TABLES
SN54ALS653, SN54AS651,
SN74ALS651A, SN74ALS653, SN74AS651
INPUTS
DATA I/O
OPERATION OR FUNCTION
OEAB
OEBA
CLKAB
CLKBA
SAB
SBA
A1– A8
B1– B8
OPERATION OR FUNCTION
L
H
H or L
X
Input
Isolation
L
H
↑↑
X
Input
Store A and B data
X
H
↑
H or L
X
Input
Unspecified
Store A, hold B
H
↑↑
X
Input
Output
Store A in both registers
L
X
H or L
↑
X
Unspecified
Input
Hold A, store B
L
↑↑
XX
Output
Input
Store B in both registers
L
X
L
Output
Input
Real-time B data to A bus
L
X
H or L
X
H
Output
Input
Stored B data to A bus
H
X
L
X
Input
Output
Real-time A data to B bus
H
H or L
X
H
X
Input
Output
Stored A data to B bus
H
L
H or L
H
Output
Stored A data to B bus and
stored B data to A bus
The data output functions may be enabled or disabled by a variety of level combinations at OEAB or OEBA. Data input functions are always
enabled; i.e., data at the bus terminals is stored on every low-to-high transition on the clock inputs.
Select control = L; clocks can occur simultaneously.
Select control = H; clocks must be staggered to load both registers.
SN54ALS652, SN54AS652,
SN74ALS652A, SN74ALS654, SN74AS652
INPUTS
DATA I/O
OPERATION OR FUNCTION
OEAB
OEBA
CLKAB
CLKBA
SAB
SBA
A1– A8
B1– B8
OPERATION OR FUNCTION
L
H
H or L
X
Input
Isolation
L
H
↑↑
X
Input
Store A and B data
X
H
↑
H or L
X
Input
Unspecified
Store A, hold B
H
↑↑
X
Input
Output
Store A in both registers
L
X
H or L
↑
X
Unspecified
Input
Hold A, store B
L
↑↑
XX
Output
Input
Store B in both registers
L
X
L
Output
Input
Real-time B data to A bus
L
X
H or L
X
H
Output
Input
Stored B data to A bus
H
X
L
X
Input
Output
Real-time A data to B bus
H
H or L
X
H
X
Input
Output
Stored A data to B bus
H
L
H or L
H
Output
Stored A data to B bus and
stored B data to A bus
The data output functions may be enabled or disabled by a variety of level combinations at OEAB or OEBA. Data input functions are always
enabled; i.e., data at the bus terminals is stored on every low-to-high transition on the clock inputs.
Select control = L; clocks can occur simultaneously.
Select control = H; clocks must be staggered to load both registers.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN54AS652FKR | AS SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CQCC28 |
| SN74ALS654-1DWR | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| SN54ALS652-1JT | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CDIP24 |
| SNJ54ALS652-1JT | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CDIP24 |
| SN54ALS653JT | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDIP24 |
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