參數(shù)資料
型號(hào): SMS8198
廠商: Summit Microelectronics, Inc.
英文描述: Philips TriMedia⑩ Processor Companion Supervisor With a 16K-bit 2-wire Serial Memory
中文描述: ⑩飛利浦代TriMedia處理器伴侶監(jiān)憑借16K的位2線串行存儲(chǔ)器
文件頁數(shù): 2/14頁
文件大?。?/td> 84K
代理商: SMS8198
2
SMS8198
2036 5.0 4/18/00
SMS8198
Tri Media
Processor
SDA
System Boot
Block
SCL
TRI_RESET#
VCR/Monitor
Audio
Local Reset
Audio
Camera
TRI_RESET#
PCI_RESET#
PCI Bus
WP
1
4
4
4
Peripheral
Peripheral
2036 ILL16.0
Figure 1. Typical Implementation of the SMS8198 and TriMedia Processor
The boot hardware operation begins with the assertion of
the reset signal TRI_RESET#. The TRI_RESET# output
from the SMS8198 is guaranteed to be valid at V
CC
-1.0V.
The reset output is asserted whenever V
CC
is less than the
V
TRIP
threshold and will remain asserted after V
CC
is
>V
TRIP
for the duration of t
PURST
. Whenever the
TRI_RESET# is active the memory will be write protected.
In addition to the reset write protection feature, pin 7 can
be tied to a pull-up to disable the write function of the
memory. This effectively turns the memory array into an
inexpensive boot ROM.
After reset is de-asserted, only the system boot block is
allowed to operate. At this point the TriMedia processor
takes over and begins to download data from the memory
array into its system boot block. The data downloaded
contains configuration data to set up the TriMedia proces-
sor and to load special ID information into the PCI configu-
ration space register. The ID information is published in
the PCI configuration register to provide the 16 bit Sub-
system ID and Subsystem Vendor ID.
It should be noted that both the threshold and the t
PURST
pulse width are programmable. Not only does this provide
maximum flexibility to the designer, but, as the processor
operating voltage levels migrate downwards, the
SMS8198 can be programmed to following this downward
trend. The values can be selected from the ordering
information table and the devices specified as standard
off-the-shelf items.
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