參數(shù)資料
型號(hào)： SMS66FR12
廠商： Summit Microelectronics, Inc.
英文描述： Six-Channel Power Supply Supervisor and Cacsade Sequence Controller
中文描述： 6通道電源監(jiān)控和Cacsade序控制器
文件頁(yè)數(shù)： 10/26頁(yè)
文件大?。?/td> 1039K
代理商： SMS66FR12
SMS66
Preliminary Information
Summit Microelectronics, Inc
2070 1.0 7/16/03
10
I
2
C 2-WIRE SERIAL INTERFACE AC OPERATING
CHARACTERISTICS - 100/400kHz
Over recommended operating conditions, unless otherwise noted. All voltages are relative to GND. See Figure 4A Timing Diagram.
Conditions
100kHz
Typ
400kHz
Typ
Symbol
Description
Min
0
4.7
4.0
Max
100
Min
0
1.3
0.6
Max
400
Units
KHz
f
SCL
t
LOW
t
HIGH
SCL Clock Frequency
Clock Low Period
Clock High Period
μ
s
μ
s
t
BUF
Bus Free Time
Before New Transmission
-
Note
1/
SCL low to valid
SDA (cycle n)
SCL low (cycle n+1)
to SDA change
4.7
1.3
μ
s
t
SU:STA
t
HD:STA
t
SU:STO
Start Condition Setup Time
Start Condition Hold Time
Stop Condition Setup Time
4.7
4.0
4.0
0.6
0.6
0.6
μ
s
μ
s
μ
s
t
AA
Clock Edge to Data Valid
0.2
3.5
0.2
0.9
μ
s
t
DH
Data Output Hold Time
0.2
0.2
μ
s
t
R
t
F
t
SU:DAT
t
HD:DAT
TI
t
WR
SCL and SDA Rise Time
SCL and SDA Fall Time
Data In Setup Time
Data In Hold Time
Noise Filter SCL and SDA
Write Cycle Time
Note
1/
1000
300
5
1000
300
5
ns
ns
ns
ns
ns
ms
Note
1/
250
0
150
0
Noise suppression
Memory Array
Configuration
Registers
100
100
t
WR
Write Cycle Time
10
10
ms
Note: 1/ - Guaranteed by Design.
t
R
t
F
t
HIGH
t
LOW
t
SU:SDA
t
HD:SDA
t
SU:DAT
t
HD:DAT
t
SU:STO
t
BUF
t
DH
t
AA
SCL
SDA
(IN)
SDA
(OUT)
t
WR (For Write Operation Only)
Figure 4A . Basic I
2
C Serial Interface Timing
TIMING DIAGRAMS
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