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參數(shù)資料
| 型號： | SMS45GCR03 |
| 廠商： | Summit Microelectronics, Inc. |
| 英文描述： | Quad Programmable Precision Cascade Sequencer and Supervisory Controller with 4k-Bit Nonvolatile Memory |
| 中文描述： | 四可編程精密級聯(lián)序列和監(jiān)督控制器4K的位的非易失性內(nèi)存 |
| 文件頁數(shù)： | 7/20頁 |
| 文件大?。?/td> | 993K |
| 代理商： | SMS45GCR03 |
7
2079 1.2 05/24/04
SMS45
SUMMIT MICROELECTRONICS, Inc.
Preliminary Information
A1,A2 (6, 7)
A1 and A2 are the address inputs. When addressing the
SMS45 memory or configuration registers the address
inputs distinguish which one of four possible devices
sharing the common bus is being addressed.
SDA (9)
SDA is the serial data input/output pin. It should be tied to
VDD_CAP through a pull-up resistor.
SCL (10)
SCL is the serial clock input. It should be tied to VDD_CAP
through a pull-up resistor.
PUP#1, PUP#2, PUP#3 (4, 5, 13)
These are the power-up permitted (PUP) active low open
drain outputs. The PUP pins are used when the SMS45 is
programmed to provide the cascade sequencing of LDOs
or DC/DC converters (
see Figures 1 and 5 for illustra-
tions of cascading
). Each delay is independently enabled
and programmable for its duration (
configuration register
7
). If all PUP# outputs are enabled the order of events
would be as follows: V
0
above threshold then delay to
PUP#1 turning on; V
1
above threshold then delay to PUP#2
turning on; V
2
above threshold then delay to PUP#3 turning
on. The delays are programmable.
PIN DESCRIPTIONS (CONTINUED)
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| SMS45GCR04 | 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Quad Programmable Precision Cascade Sequencer and Supervisory Controller with 4k-Bit Nonvolatile Memory |
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| SMS45GCR06 | 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Quad Programmable Precision Cascade Sequencer and Supervisory Controller with 4k-Bit Nonvolatile Memory |
| SMS45GCR07 | 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Quad Programmable Precision Cascade Sequencer and Supervisory Controller with 4k-Bit Nonvolatile Memory |
| SMS45GR00 | 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Quad Programmable Precision Cascade Sequencer and Supervisory Controller with 4k-Bit Nonvolatile Memory |
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