參數(shù)資料
型號(hào)： SMS44
廠商： Summit Microelectronics, Inc.
英文描述： Highly Programmble Voltage Supervisory Circuit
中文描述： 高度可編程電壓監(jiān)控電路
文件頁(yè)數(shù)： 14/16頁(yè)
文件大小： 401K
代理商： SMS44
14
SMS44
2047 2.3 10/23/00
SUMMIT MICROELECTRONICS, Inc.
Acknowledge Polling
When the SMS44 is performing an internal WRITE opera-
tion it will ignore any new START conditions. Since the
device will only return an acknowledge after it accepts the
START the part can be continuously queried until an
acknowledge is issued, indicating that the internal WRITE
cycle is complete. See the flow diagram for the proper
sequence of operations for polling.
READ OPERATIONS
Read operations are initiated with the R/W bit of the
identification field set to
“
1.
”
T here are two different read
options: 1. Current Address Byte Read, and 2. Random
Address Byte Read
Figure 11. Write Flow Chart
Current Address Read (memory only)
The SMS44 contains an internal address counter which
maintains the address of the last word accessed, incre-
mented by one. If the last address accessed (either a read
or write) was to address location n, the next read operation
would access data from address location n+1 and incre-
ment the current address pointer. When the SMS44
receives the slave address field with the R/W bit set to
“
1,
”
it issues an acknowledge and transmits the 8-bit word
stored at address location n+1. The current address byte
read operation only accesses a single byte of data. The
master does not acknowledge the transfer, but does
generate a stop condition. At this point, the SMS44
discontinues data transmission.
Random Address Read (Register and Memory)
Random address read operations allow the master to
access any memory location in a random fashion. This
operation involves a two-step process. First, the master
issues a write command which includes the start condition
and the slave address field (with the R/W bit set to WRITE),
followed by the address of the word it is to read. This
procedure sets the internal address counter of the SMS44
to the desired address. After the word address acknowl-
edge is received by the master it immediately reissues a
start condition, followed by another slave address field
with the R/W bit set to READ. The SMS44 will respond with
an acknowledge and then transmit the 8 data bits stored
at the addressed location. At this point the master does not
acknowledge the transmission but does generate the stop
condition. The SMS44 discontinues data transmission
and reverts to its standby power mode.
Sequential READ (Memory Only)
Sequential reads can be initiated as either a current
address READ or random access READ. The first word
is transmitted as with the other byte read modes (current
address byte READ or random address byte READ);
however, the master now responds with an ACKnowl-
edge, indicating that it requires additional data from the
SMS44. The SMS44 continues to output data for each
ACKnowledge received. The master terminates the se-
quential READ operation by not responding with an AC-
Knowledge, and issues a stop condition. During a sequen-
tial read operation the internal address counter is auto-
matically incremented with each ACKnowledge signal.
For read operations all address bits are incremented,
allowing the entire array to be read using a single read
command. After a count of the last memory address the
address counter will
‘
roll-over
’
and the memory will con-
tinue to output data.
Next
Operation
a Write
ACK
Returned
Issue
Address
Proceed
With
Write
Await
Next
Command
Issue Stop
Issue Slave
Address and
R/W = 0
Issue Stop
Write Cycle
In Progress
Yes
No
Issue Start
2047 Fig11 2.1
Yes
No
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