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參數(shù)資料
| 型號(hào)： | SMS2902SA |
| 廠商： | Summit Microelectronics, Inc. |
| 英文描述： | Voltage Supervisory Circuit With Watchdog Timer |
| 中文描述： | 電壓監(jiān)控電路，帶有看門(mén)狗定時(shí)器 |
| 文件頁(yè)數(shù)： | 8/14頁(yè) |
| 文件大小： | 161K |
| 代理商： | SMS2902SA |
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8
SMS2902/SMS2904/SMS2916
2028 5.1 8/2/00
FIGURE 7. PAGE/BYTE WRITE MODE
WRITE OPERATIONS
The SMS29xx allows two types of write operations: byte
write and page write. The byte write operation writes a
single byte during the nonvolatile write period (t
WR
). The
page write operation allows up to 16 bytes in the same
page to be written during t
WR
.
Byte WRITE
Upon receipt of both the slave address and word address,
the SMS29xx responds with an ACKnowledge for each.
After receiving the next byte of data, it again responds with
an ACKnowledge. The master then terminates the trans-
fer by generating a STOP condition, at which time the
SMS29xx begins the internal write cycle.
While the internal write cycle is in progress, the SMS29xx
inputs are disabled, and the device will not respond to any
requests from the master. Refer to Figure 7 for the
address, ACKnowledge and data transfer sequence.
Page WRITE
The SMS29xx is capable of a 16-byte page write opera-
tion. It is initiated in the same manner as the byte-write
operation, but instead of terminating the write cycle after
the first data word, the master can transmit up to 15 more
bytes of data. After the receipt of each byte, the SMS29xx
will respond with an ACKnowledge.
The SMS29xx automatically increments the address for
subsequent data words. After the receipt of each word,
the low order address bits are internally incremented by
one. The high order five bits of the address byte remain
constant. Should the master transmit more than 16 bytes,
prior to generating the STOP condition, the address
counter will
“
roll over,
”
and the previously written data will
be overwritten. As with the byte-write operation, all inputs
are disabled during the internal write cycle. Refer to
Figure 7 for the address, ACKnowledge and data transfer
sequence.
The next three bits are the high order address bits on the
2904 and 2916 and are
“
Don
’
t Care
”
on the 2902.
Read/Write Bit
The last bit of the data stream defines the operation to be
performed. When set to
“
1,
”
a read operation is selected;
when set to
“
0,
”
a write operation is selected.
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
D
7
D
5
D
6
D
4
D
0
D
3
D
2
D
1
S
T
A
R
T
Word Address
Data Byte n
Data Byte n+15
S
T
O
P
A
C
K
Acknowledges Transmitted from
SMS29xx to Master Receiver
Slave Address
Device
Type
Address
Read/Write
0= Write
SDA
Bus
Activity
A
C
K
A
C
K
Master Sends Read
Request to Slave
Master Writes Word
Address to Slave
1 0 1 0
0
Data Byte n+1
A
C
K
Master Writes
Data to Slave
Master Transmitter
to
Slave Receiver
Slave Transmitter
to
Master Receiver
Slave Transmitter
to
Master Receiver
Master Transmitter
to
Slave Receiver
Master Transmitter
to
Slave Receiver
Shading Denotes
SMS29xx
SDA Output Active
Master Transmitter
to
Slave Receiver
Slave Transmitter
to
Master Receiver
Slave Transmitter
to
Master Receiver
Master Transmitter
to
Slave Receiver
Slave Transmitter
to
Master Receiver
Master Writes
Data to Slave
Master Writes
Data to Slave
Acknowledges Transmitted from
SMS29xx to Master Receiver
If single byte-write only,
Stop bit issued here.
X
X
R
W
A
10
A
9
A
10
A
9
A
C
K
2028 ILL9.1
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| SMS2902SB | 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Voltage Supervisory Circuit With Watchdog Timer |
| SMS2904S | 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Voltage Supervisory Circuit With Watchdog Timer |
| SMS2904S2.7 | 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Voltage Supervisory Circuit With Watchdog Timer |
| SMS2904SA | 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Voltage Supervisory Circuit With Watchdog Timer |
| SMS2904SB | 制造商:SUMMIT 制造商全稱:SUMMIT 功能描述:Voltage Supervisory Circuit With Watchdog Timer |
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