
SMR101
PACKAGE AND PIN CONFIGURATION
6 Ball
Ultra
CSP
TM
Bottom View
Preliminary Information
Summit Microelectronics, Inc
209
1
2.1 4/21/2005
4
PIN DESCRIPTIONS
CSP
Ball
Number
Number
RESET_IN#
VDD
HARD_RST#
GND
PROG
A1
A2
B1
B2
C1
C2
SOFT_RST#
1
2
4
3
8
7
5
6
PROG
NC
RESET_IN#
GND
VDD
NC
SOFT_RST#
HARD_RST#
SOIC
Lead
Pin
Type
Pin Name
Pin Description
A1
1
I
PROG
High voltage programming pin. Connected to ground during
normal operation.
A2
8
PWR
VDD
Positive supply voltage.
B1
4
PWR
GND
Ground pin.
B2
5
O
HARD_RST#
Open Drain active low Hard Reset Out indicator. Internally
connected to VDD through a 100K
resistor.
De-bounced push button switch input. Internally connected to VDD
through a 100K
resistor. Also used as the Data input
programming pin.
Open Drain active low Soft Reset Out indicator. Internally
connected to VDD through a 100K
resistor.
No Connect
C1
3
I
RESET_IN#
C2
6
O
SOFT_RST#
NA
2,7
NC
NC
8 Lead SOIC
Top View