
SMM764
Preliminary Information
Summit Microelectronics, Inc
2098 1.1 6/29/2005
19
APPLICATIONS INFORMATION (CONTINUED)
UNDERVOLTAGE LOCKOUT
The internally filtered supply voltage as seen across
VDD_CAP is edge-triggered to lock out false or
nuisance signals during both the power-on and power-
off sequences. If the VDD_CAP voltage falls below
VDD_CAP
2.5V (Figure 10), an internal undervoltage lockout
(UVLO) circuit will reset all internal logic. Once power
has recovered above 2.6V the SMM764 will restart as
if a Command-Triggered power-off had been issued.
2.5V
3.6V, 5.5V
UVLO
(Internal)
2.6V
Figure 10 - Timing Sequence recovering from a VDD_CAP Power ‘Brown-Out’