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參數(shù)資料
| 型號： | SMH4814SR03 |
| 廠商： | Summit Microelectronics, Inc. |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Dual Feed Active-ORing Programmable Hot Swap Controller |
| 中文描述： | 雙飼料有源ORing提供可編程熱插拔控制器 |
| 文件頁數(shù)： | 31/44頁 |
| 文件大?。?/td> | 935K |
| 代理商： | SMH4814SR03 |
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SMH4814
Preliminary Information
Summit Microelectronics, Inc
2080 2.0 07/21/05
31
Configuration Registers:
There are 20 user programmable configuration
registers in the SMH4814. The following tables
describe the configuration register bits in detail.
In cases where a timer is used, refer to the Timers
Table 3 for a description of the codes required for
each timeout selection.
Table 3 - Timers
All timers may be configured to one of the following sixteen choices:
Bit Code Timer (ms) Bit Code Timer (ms)
Bit Code
Timer (ms)
Bit Code Timer (ms)
0000
0.25
0100
16
1000
64
1100
256
0001
2
0101
24
1001
96
1101
384
0010
8
0110
32
1010
128
1110
512
0011
12
0111
48
1011
192
1111
768
Register R00 – Initial Current Regulation and PD power-on delay.
Bits D[7:4] control the Initial Current Regulation Timer (defines the amount of time current regulation is allowed during
initial power-on). Bits D[3:0] control the Pin Detect delay (defines the time from when the PD’s are enabled and UV &
OV are valid until VGATE_HS is allowed to turn on)
Register R00
D7
D6
D5
D4
D3
D2
D1
D0
1
0
0
0
X
X
X
X
X
X
X
X
1
0
0
0
Register R01 –Sequence position.
Bits D[7:4] control the Time Slot 1 (time from FB high to second PUP allowed to go active). Bits D[3:0] control the
Time Slot 0, which is the time from when the FET is fully on to when the first PUP goes active.
Register R01
D7
D6
D5
D4
D3
D2
D1
D0
Action
Initial Current Regulation Timer – 64ms, See Table 3
Pin Detect Delay – 64ms, See Table 3
Action
1
0
0
0
X
X
X
X
Time Slot 1 - Time from FB
X
high to second PUP
X
allowed to go active– 64ms, See Table 3
Time Slot 0 - Time from FB
X
high to first PUP
X
allowed to go active – 64ms, See Table 3
X
X
X
X
1
0
0
0
CONFIGURATION REGISTERS
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