參數(shù)資料
型號: SMDA05C-8.TE
元件分類: 參考電壓二極管
英文描述: 300 W, BIDIRECTIONAL, 9 ELEMENT, SILICON, TVS DIODE, MS-012AB
封裝: PLASTIC, SO-14
文件頁數(shù): 5/5頁
文件大?。?/td> 540K
代理商: SMDA05C-8.TE
5
2003 Semtech Corp.
www.semtech.com
PROTECTION PRODUCTS
SMDA05C-8 through SMDA24C-8
Circuit Diagram
Connection Diagram
Device Connection for Protection of Eight Data Lines
The SMDAxxC-8 is designed to protect up to 8 data or
I/O lines. They are bidirectional devices and may be
used on lines where the signal polarities are above and
below ground.
The SMDAxxC-8 TVS arrays employ a monolithic struc-
ture. Therefore, the working voltage (V
RWM) and break-
down voltage (V
BR) specifications apply to the differen-
tial voltage between any two data line pins. For ex-
ample, the SMDA24C-8 is designed for a maximum
voltage excursion of ±12V between any two data lines.
The device is connected as follows:
Pins 2, 3, 5, 6, 9, 10, 12 and 13 are connected to
the lines that are to be protected. Pins 1, 7, 8,
and 14 are connected to ground. The ground
connections should be made directly to the ground
plane for best results. The path length is kept as
short as possible to reduce the effects of parasitic
inductance in the board traces. Pins 4 and 11 are
not connected.
Circuit Board Layout Recommendations for Suppres-
sion of ESD.
Good circuit board layout is critical for the suppression
of ESD induced transients. The following guidelines are
recommended:
Place the TVS near the input terminals or connec-
tors to restrict transient coupling.
Minimize the path length between the TVS and the
protected line.
Minimize all conductive loops including power and
ground loops.
The ESD transient return path to ground should be
kept as short as possible.
Never run critical signals near board edges.
Use ground planes whenever possible.
GND
I/O 1
I/O 2
N.C.
I/O 3
I/O 4
GND
N.C.
GND
I/O 5
I/O 6
I/O 7
I/O 8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Applications Information
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