參數(shù)資料
型號(hào): SM4J-67202V-25FHXXX
廠商: ATMEL WIRELESS MICROCONTROLLERS
元件分類: FIFO
英文描述: 1K X 9 OTHER FIFO, 25 ns, CQCC32
封裝: LCC-32
文件頁(yè)數(shù): 1/17頁(yè)
文件大小: 180K
代理商: SM4J-67202V-25FHXXX
M67201A/M67202A
Rev. D (11 April. 97)
1
MATRA MHS
Introduction
The M67201A/202A implement a first-in first-out
algorithm, featuring asynchronous read/write operations.
The FULL and EMPTY flags prevent data overflow and
underflow. The Expansion logic allows unlimited
expansion in word size and depth with no timing
penalties. Twin address pointers automatically generate
internal read and write addresses, and no external address
information are required for the TEMIC FIFOs. Address
pointers are automatically incremented with the write pin
and read pin. The 9 bits wide data are used in data
communications applications where a parity bit for error
checking is necessary. The Retransmit pin reset the Read
pointer to zero without affecting the write pointer. This is
very useful for retransmitting data when an error is
detected in the system.
Using an array of eigh transistors (8 T) memory cell and
fabricated with the state of the art 1.0
m lithography
named SCMOS, the M 67201A/202A combine an
extremely low standby supply current (typ = 1.0
A) with
a fast access time at 25 ns over the full temperature range.
All versions offer battery backup data retention capability
with a typical power consumption at less than 5
W.
For military/space applications that demand superior
levels
of
performance
and
reliability
the
M 67201A/202A is processed according to the methods
of the latest revision of the MIL STD 883 (class B or S)
and/or ESA SCC 9000.
Features
D First-in first-out dual port memory
D 512 × 9 organisation (M 67201A)
D 1024 × 9 organisation (M 67202A)
D Fast access time
20*, 25, 35, 45, 55 ns, commercial, industrial and
automotive
20*, 25, 30, 40, 50 ns, military
D Wide temperature range :
– 55
°C to + 125°C
D 67201AL/202AL low power 67201AV/202AV very low
power
D Fully expandable by word width or depth
* Preview. Please Consult Sales.
D Asynchronous read/write operations
D Empty, full and half flags in single device mode
D Retransmit capability
D Bi-directional applications
D Battery back-up operation : 2 V data retention
D TTL compatible
D Single 5 V ± 10 % Power Supply (1)
D High performance SCMOS technology
(1) 3.3 V versions are also available. Please consult sales.
512
9 & 1 K 9 CMOS Parallel FIFO
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