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參數(shù)資料
| 型號： | SM320MCM41DHFHM40 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 32-BIT, 40 MHz, OTHER DSP, CQFP352 |
| 封裝： | CERAMIC, QFP-352 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 184K |
| 代理商： | SM320MCM41DHFHM40 |
SMJ320MCM41D
SINGLE-SMJ320C40 MULTICHIP MODULE
SGKS002 – OCTOBER 1997
10
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
thermal analysis
Thermal conduction of components in the SMJ320MCM41D is dependent on the thermal resistance of the
material under each die as well as the die area thermally connected to the heat-dissipating medium. Since these
properties vary with layout and die size, ’C40 and SRAM components should be considered separately. The
following table lists primary parameters required for thermal analysis of the module. The junction temperature,
TJ, is not to be exceeded for the ’C40 or the SRAM die.
primary parameters required for thermal analysis of the SMJ320MCM41D module
PARAMETER
ALTERNATE
SYMBOL
MIN
TYP
MAX
UNIT
TJ
Junction temperature under operating condition
TJ
150
°C
PMCM
Single MCM power dissipation
PMCM
2.0
5.2
W
Z0JC
Thermal impedance (junction-to-case) of package
Tjc
1.3
°C/W
Z0JA
Thermal impedance (junction-to-ambient air, 0 cfm) of package
Tja
28.0
°C/W
TSOL
Maximum solder temperature (10 s duration)
TSOL
260
°C
power estimation
The power requirements of the ’320MCM41 have been characterized over the operating temperature range.
See the application report
Calculation of TMS320C40 Power Dissipation (literature number SPRA032) as
reference for power estimation of the ’C40 components.
Typical power dissipation has been measured with the ’C40s executing a 64-point Fast Fourier Transform (FFT)
algorithm. Input and output data arrays resided in module SRAM, and output data was written out to the
global-address space. The global databus was loaded with 80-pF test loads, and both local and global writes
were configured for zero-wait-state memory. Under typical conditions of 25
°C, 5-V VCC, and 40-MHz CLKIN
frequency, the power dissipation was measured to be 1.75 W.
Maximum power dissipation has been measured under worst-case conditions. The global databus was loaded
with 80-pF test loads, and simultaneous zero-wait-state writes have been performed to both local and global
buses. Under worst-case conditions of – 55
°C, 5.25-V VCC, and 40-MHz CLKIN frequency, the power
dissipation was determined to be 3 W. The algorithm executed during these tests consists of parallel writes of
alternating 0xAAs and 0x55s to both local SRAM and global-address spaces. This algorithm is not considered
to be a practical use of the ’C40’s resources; therefore, the associated power measurement should be
considered absolute maximum only.
ADV
ANCE
INFORMA
TION
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