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參數(shù)資料
| 型號(hào)： | SLA 24C04 |
| 廠商： | SIEMENS AG |
| 元件分類： | DRAM |
| 英文描述： | 4 Kbit (512 ×8 bit) Serial CMOS-EEPROM with IIC Synchronous 2-Wire Bus(4K位 (512 ×8 位)CMOS串行EEPROM(帶IIC控制)) |
| 中文描述： | 4千位（512 × 8位）串行的CMOS EEPROM，帶有國際進(jìn)口同步2線巴士（4K的位（512 × 8位）的CMOS串行EEPROM的（帶控制國際進(jìn)口許可證）） |
| 文件頁數(shù)： | 10/23頁 |
| 文件大小： | 324K |
| 代理商： | SLA 24C04 |
SLx 24C04
Semiconductor Group
10
1999-02-02
4
After a START condition, the master always transmits a Command Byte CSW or CSR.
After the acknowledge of the EEPROM a Control Byte follows, its content and the
transmitter depend on the previous Command Byte. The description of the Command
and Control Bytes is shown in
table 2
.
Device Addressing and EEPROM Addressing
The device has an internal address counter which points to the current EEPROM
address.
The address counter is incremented
– after a data byte to be written has been acknowledged, during entry of further data
byte
– during a byte read, thus the address counter points to the following address after
reading a data byte.
Command Byte
Selects operation:
the least significant bit b0 is low for a write
operation (Chip Select Write Command Byte CSW) or set high for a
read operation (Chip Select Read Command Byte CSR).
Contains address information:
in the CSW Command Byte, the
bit position b1 is decoded for the uppermost EEPROM address bit
A8 (in the CSR Command Byte, the bit positions b3 to b1 are left
undefined, in the CSW Command Byte, the bit positions b3 and b2
as well).
Following CSW (b0 = 0):
contains the eight lower bits of the
EEPROM address (EEA) bit A7 to A0.
Following CSR (b0 = 1):
contains the data read out, transmitted by
the EEPROM. The EEPROM data are read as long as the master
pulls down SDA after each byte in order to acknowledge the
transfer. The read operation is stopped by the master by releasing
SDA (no acknowledge is applied) followed by a STOP condition.
Control Byte
Table 2
Command and Control Byte for
I
2
C-Bus Addressing of Chip and EEPROM
Definition
b7
b6
b5
b4
b3
b2
CSW
1
0
1
0
x
x
CSR
1
0
1
0
x
x
EEA
A7
A6
A5
A4
A3
A2
Function
b1
A8
x
A1
b0
0
1
A0
Chip Select for Write
Chip Select for Read
EEPROM address
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SLA24C04-D | 制造商:Siemens 功能描述:512 X 8 I2C/2-WIRE SERIAL EEPROM, PDIP8 |
| SLA24C04-D/P | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:4 Kbit 512 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus, Page Protection Mode |
| SLA24C04-D-3 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:4 Kbit 512 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus |
| SLA24C04-D-3/P | 制造商:Siemens 功能描述:512 X 8 I2C/2-WIRE SERIAL EEPROM, PDIP8 |
| SLA24C04-S | 制造商:Infineon Technologies AG 功能描述:SLA24C04 SO-8 |
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