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參數(shù)資料
| 型號： | SL38160AZC-24AH |
| 廠商： | SILICON LABORATORIES |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 148.5 MHz, VIDEO CLOCK GENERATOR, PDSO16 |
| 封裝： | 0.173 INCH, 0.65 MM PITCH, ROHS COMPLIANT, MO-153AB, TSSOP-16 |
| 文件頁數(shù)： | 13/17頁 |
| 文件大?。?/td> | 338K |
| 代理商： | SL38160AZC-24AH |
Rev AB January 16, 2011
Document Number: SL-AP-0827
Page 5 of 17
SL38160-18AH
SL38160-24AH
F3SEPHI
Third overtone separation,
high side
Mechanical third
(High side of 3xFNOM)
240
-
ppm
F3SEPLO
Third overtone separation,
low side
Mechanical third
(Low side of 3xFNOM)
-
-240
ppm
Serial Data Interface
To enhance the flexibility and function of the device, an I2C compatible interface is provided. Through the
Serial Data Interface, various device functions, such as the VCLK frequency setting and individual clock
output buffers can be individually enabled or disabled. The registers associated with the Serial Data
Interface initialize to their default setting at power-up. Clock device register changes can be made after the
device power up initialization process has completed.
Data Protocol
The clock driver serial protocol accepts byte write, byte read, block write, and block read operations from
the controller. For block write/read operation, Access the bytes in sequential order from lowest to highest
(most significant bit first) with the ability to stop after any complete byte is transferred. For byte write and
byte read operations, the system controller can access individually indexed bytes. The offset of the indexed
byte is encoded in the command code descried in the command code definition section.
The block write and block read protocol is outlined in the block read and block write protocol section, while
The byte read and byte write protocol section outlines byte read and byte write information.
The slave receiver address is 11010100 (D4h) for the SL38160AZC-18AH.
The slave receiver address is 11011100 (DCh) for the SL38160AZC-24AH.
.
Command Code Definition
Bit
Description
7
0 = Block read or block write operation, 1 = Byte read or byte write operation
(6:0)
Byte offset for byte read or byte write operation. For block read or block operations, these bits
should be ‘0000000’
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| SL38160CZC-33CHT | 功能描述:IC CLOCK SSCG 4PLL 5CH 16TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:* 標準包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
| SL38160CZC-XXXX | 制造商:Silicon Laboratories Inc 功能描述:IC CLOCK 200MHZ 4PLL 16TSSOP |
| SL38160ZC | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 1-200MHz 4PLL 5Out 2RF CG/SSCG 3.3-2.5V RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SL38160ZC-17AHT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Cavium PureVu RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SL38160ZC-18AHT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Cavium PureVu RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
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