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參數(shù)資料
| 型號： | SL23EP04SC-1T |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| 封裝： | 0.150 INCH, ROHS COMPLIANT, SOIC-8 |
| 文件頁數(shù)： | 14/14頁 |
| 文件大?。?/td> | 332K |
| 代理商： | SL23EP04SC-1T |
Rev 1.1, May 25, 2007
Page 9 of 14
SL23EP04
Input Duty Cycle
DC1
Measured at VDD/2, all versions
40
50
60
%
Output Duty Cycle
DC2
CL=15pF, Fout=66 MHz, all versions
Measured at VDD/2
45
50
55
%
Output Duty Cycle
DC3
CL=15pF, Fout=133 MHz, all versions
Measured at VDD/2
45
50
55
%
Output Duty Cycle
DC4
CL=15pF, Fout=166 MHz, all versions
Measured at VDD/2
40
50
60
%
Output Rise/Fall Time
tr/f1
CL=30pF, -1 and -2 versions
Measured at 0.6 to 1.8V
-
2.4
ns
Output Rise/Fall Time
tr/f2
CL=15pF, -1 and -2 versions
Measured at 0.6 to 1.8V
-
1.7
ns
Output Rise/Fall Time
tr/f3
CL=30pF, -1H and -2H versions
Measured at 0.6 to 1.8V
-
1.7
ns
Output Rise/Fall Time
tr/f4
CL=15pF, -1H and -2H versions
Measured at 0.6 to 1.8V
-
1.4
ns
Output-to-Output Skew
on Same Bank
SKW1
-1 and -2, measured at VDD/2
and outputs are equally loaded
-
80
175
ps
Output-to-Output Skew
on Same Bank
SKW2
-1H and -2H, measured at VDD/2
and outputs are equally loaded
-
70
150
ps
Output-to-Output Skew
Between Bank A and B
SKW3
-1 and -2, measured at VDD/2
and outputs are equally loaded
-
125
300
ps
Output-to-Output Skew
Between Bank A and B
SKW4
-1H and -2H, measured at VDD/2
and outputs are equally loaded
-
110
250
ps
Device-to-Device Skew
SKW5
All versions, measured at VDD/2 and
outputs are equally loaded
-
175
450
ps
Input-to-Output Delay
Dt
All versions, CLKIN to FBK rising
edge, measured at VDD/2 and outputs
are equally loaded
-250
+/-90
250
ps
Fout=66.6 MHz and CL=15pF
-
70
140
ps
Cycle-to-Cycle Jitter
(-1 and -2 Versions)
CCJ1
Fout=133.3 MHz and CL=15pF
-
60
120
ps
Switching Electrical Characteristics (C-Grade and VDD=2.5V)
Unless otherwise stated VDD= 2.5+/- 10%, CL=15pF and Ambient Temperature range 0 to +70°C
Fout=66.6 MHz and CL=15pF
-
60
120
ps
Cycle-to-Cycle Jitter
(-1H and -2H Versions)
CCJ2
Fout=166.6 MHz and CL=15pF
-
50
100
ps
PLL Lock Time
tLOCK
From 0.95VDD and valid clock
presented at CLKIN
-
1.0
ms
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SL23EP05IT-1 | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| SL23EP05SI-1 | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| SL23EP05SI-1HT | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| SL23EP05SI-1 | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| SL23EP05SI-1T | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SL23EP04SC-2 | 功能描述:時(shí)鐘緩沖器 10-220MHz 4 Outputs ZDB 3.3-2.5V RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| SL23EP04SC-2H | 功能描述:時(shí)鐘緩沖器 10-220MHz 4 Outputs ZDB 3.3-2.5V RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| SL23EP04SC-2HT | 功能描述:時(shí)鐘緩沖器 10-220MHz 4 Outputs ZDB 3.3-2.5V RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| SL23EP04SC-2T | 功能描述:時(shí)鐘緩沖器 10-220MHz 4 Outputs ZDB 3.3-2.5V RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| SL23EP04SI-1 | 功能描述:時(shí)鐘緩沖器 10-220MHz 4 Outputs ZDB 3.3-2.5V RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
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