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參數(shù)資料
| 型號： | SL2305ZC-1T |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| 封裝： | 0.173 MM, ROHS COMPLLIANT, TSSOP-8 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 273K |
| 代理商： | SL2305ZC-1T |
Rev 2.1, October 22, 2007
Page 6 of 11
SL2305
Switching Specifications: Unless otherwise stated VDD=3.3V+/-10% and both C and I Grades
Symbol
Description
Condition
Min
Max
Unit
High drive (-1H). All outputs CL=15pF
10
140
MHz
High drive (-1H), All outputs CL=30pF
10
100
MHz
Standard drive, (-1), All outputs CL=15pf
10
100
MHz
FMAX1
Maximum Frequency
[1]
(Input=Output )
All Active PLL Modes
Standard drive, (-1), All outputs CL=30pf
10
66
MHz
INDC
Input Duty Cycle
Measured at 1.4V, Fout=66MHz,
CL=15pF
30
70
%
OUTDC1
Output Duty Cycle
[2]
Measured at 1.4V, Fout≥50MHz,
CL=15pF
40
60
%
OUTDC2
Output Duty Cycle
[2]
Measured at 1.4V, Fout≤50MHz,
CL=15pF
45
55
%
High drive (-1H), CL=10pF
–
1.5
ns
High drive (-1H), CL=30pF
–
1.8
ns
Standard drive (-1), CL=10pF
–
2.2
ns
tr/f
Rise, Fall Time (3.3V)
[2]
(Measured at: 0.8 to 2.0V)
Standard drive (-1), CL=30pF
–
2.5
ns
t1
Output-to-Output Skew
[2]
(Measured at VDD/2)
All outputs CL=0 or equally loaded, -1 or
-1H drives
–
150
ps
t2
Product-to-Product Skew
[2]
(Measured at VDD/2)
All outputs CL=0 or equally loaded, -1 or
-1H drives
–
400
ps
t3
Delay Time, CLKIN Rising
Edge to CLKOUT Rising
Edge
[2]
Measured at VDD/2
–220
220
ps
tPLOCK
PLL Lock Time
[2]
Time from 90% of VDD to valid clocks on
all the output clocks
–
1.0
ms
Fin=Fout=66 MHz, <CL=15pF, -1H drive
–
140
ps
Fin=Fout=66 MHz, <CL=15pF, -1 drive
–
150
ps
Fin=Fout=66 MHz, <CL=30pF, -1H drive
–
160
ps
CCJ
Cycle-to-cycle Jitter
[2]
Fin=Fout=66 MHz, <CL=30pF, -1 drive
–
170
ps
Notes:
1. For the given maximum loading conditions. See CL in Operating Conditions Table.
2. Parameter is guaranteed by design and characterization. Not 100% tested in production.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SL2309ZI-1T | 2309 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| SL2309SI-1H | 2309 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| SL2309ZI-1 | 2309 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| SL2309SI-1 | 2309 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| SL2309ZC-1 | 2309 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SL2305ZI-1 | 功能描述:時鐘緩沖器 10-140MHz 5 Outputs ZDB 3.3V RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| SL2305ZI-1H | 功能描述:時鐘緩沖器 10-140MHz 5 Outputs ZDB 3.3V High Drive RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| SL2305ZI-1HT | 功能描述:時鐘緩沖器 10-140MHz 5 Outputs ZDB 3.3V High Drive RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| SL2305ZI-1T | 功能描述:時鐘緩沖器 10-140MHz 5 Outputs ZDB 3.3V RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| SL2309 | 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:Low Jitter and Skew 10 to 140MHz Zero Delay Buffer (ZDB) |
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