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參數(shù)資料
| 型號： | SL2101CNP2Q |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Synthesized Broadband Converter with Programmable Power |
| 中文描述： | 合成寬帶可編程電源轉(zhuǎn)換器 |
| 文件頁數(shù)： | 20/27頁 |
| 文件大?。?/td> | 625K |
| 代理商： | SL2101CNP2Q |
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SL2101
Data Sheet
20
Zarlink Semiconductor Inc.
Conversion gain
12
dB
Differential voltage gain to 50
load on output of impedance
transformer as in Figure 6. See
Figure 20 for programmable
settings.
Gain variation within
channel
0.5
dB
Channel bandwidth 8 MHz within
operating frequency range.
Through gain
-20
dB
45-1400 MHz
IPIP3
2T
117
dB
μ
V
See Note 2.
IPIM3
2T
-46
dBc
See Note 2. See Figure 12.
LO operating range
1
2.3
GHz
Maximum tuning range
determined by application, see
Note 4.
LO phase noise, SSB
@ 10 kHz offset
@ 100 kHz offset
-92
-112
dBc/Hz
dBc/Hz
Application as in Figure 18. See
Figure 19.
LO phase noise floor
-136
dBc/Hz
Application as in Figure 18.
IF output frequency
range
14, 15
100
MHz
IF output impedance
See Figure 22.
Synthesizer
SDA, SCL
3, 4
Input high voltage
3
5.5
V
I
2
C ‘Fast mode’ compliant
Input low voltage
0
1.5
V
Input high current
10
μ
A
Input voltage = Vcc
Input low current
-10
μ
A
Input voltage = Vee
Leakage current
10
μ
A
Vcc=Vee
Hysterysis
0.4
SDA output voltage
3
0.4
0.6
V
V
Isink = 3 mA
Isink = 6 mA
SCL clock rate
4
400
kHz
Charge pump output
current
28
See Figure 29.
Vpin = 2 V
Charge pump output
leakage
28
+-3
+-10
nA
Vpin = 2 V
Characteristic
Pin
Min.
Typ.
Max.
Units
Conditions
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