參數(shù)資料
型號(hào): SL1935NP1Q
廠商: Zarlink Semiconductor Inc.
英文描述: Single Chip Synthesized Zero IF Tuner
中文描述: 單芯片合成零中頻調(diào)諧器
文件頁(yè)數(shù): 17/23頁(yè)
文件大?。?/td> 415K
代理商: SL1935NP1Q
17
SL1935
SL1935 Demo Board
The demo board contains an SL1935 I
2
Cbus controlled
Zero IF tuner IC, plus all components necessary to
demonstrate operation of the SL1935. The schematic
and PCB layout of the board are shown in Figures 19, 20
and 21.
Supplies
The board must be provided with the following supplies:
5V for the synthesiser section (5VD)
5V for the converter and baseband sections (5V)
30V for the varactor line (30V)
The supply connector is a 5 pin 0.1
pin header.
The order of connections is 5V
GND
30V
GND
5V.
I
2
C bus connections
The board is provided with a RJ11 I
2
C bus connector
which feeds directly to the synthesiser. This connects to
a standard 4 way cable.
Operating instructions
1. Software.
Use the Zarlink Semiconductor synthesiser software. Pull
down the
Device
menu, then select the
SL1935
. It is
suggested that the charge pump is set to 130uA with a
reference divider ratio of 32. These settings give a small
loop bandwidth (i.e. 100
s Hz), which allows detailed
phase noise measurements of the oscillators to be taken
if desired.
2.
VCO control
.
The two VCO
s are selected by toggling the oscillator
switch below the two oscillators on the main software
block diagram. This switch programs bit VS of the I
2
C data
(see Tables 8 and 9a to 9c).
VCOS oscillates at twice the LO frequency (lower band)
and is then divided by two to provide the required LO
frequency in the range 950MHz to 1500MHz
(approximately).
VCOV oscillates at the LO frequency (upper band) in the
range 1500MHz to 2150MHz (approximately).
3.
Baseband path select.
The SL1935 has two filter paths selected by programming
bit BS of the I
2
Cdata (see Tables 6 and 9a to 9c). The
value of BS is changed by toggling the switch position to
the left of
Filter A
and
Filter B
on the main software block
diagram.
4.
AGC control
.
The conversion gain of the SL1935 is set by the voltage
applied to the AGCCONT input. On the demo board this
is controlled by the potential divider labelled
AGC ADJ
which varies the AGCCONT input from 0V to Vcc.
CAUTION
: Care should be taken to ensure the chip is
powered ON if the board is modified to accept an external
AGC input voltage. Damage to the device may result if this
is not complied with as a result of the IC powering itself up
via the AGCCONT input ESD protection diode. It is
recommended that a low current limit is set on any
external AGC voltage source used.
5.
Free running the VCO
s.
Select the required VCO as detailed in (2) above. Program
an LO frequency which is above the maximum capability
of the oscillator. 3GHz is suggested. Under this condition
the varactor control voltage is pumped to its maximum
value, ie to the top of the band. The oscillator frequency
can now be manually tuned by varying the 30V supply.
Characteristic
Min
Max
7
6
Vcc+0.3
10
150
150
20
Units
V
V
V
mA
o
C
o
C
Conditions
Supply voltage
SD
A, SCL DC offsets
All I/O port DC offsets
Por
t P0 current
Storage temperature
J
unction temperature
Pac
kage thermal resistance,
chip to case
Pac
kage thermal resistance,
chip to ambient
Po
wer consumption at 5.25V
ESD protection
-0.3
-0.3
-0.3
-55
3.5
77
919
o
C/W
o
C/W
mW
kV
Vcc = Vee to 5.25V
Mil-std 883 method 3015 cat1
Table 11. Absolute Maximum Ratings
(All voltages referred to Vee at 0V and Vcc = Vccd)
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