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參數(shù)資料
| 型號： | SL15300ZI |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 4/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK SSCG 1PLL 2CH 8TSSOP |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 系列： | * |
Rev 2.0, October 11, 2010
Page 12 of 16
SL15300
Output Duty Cycle
DC2
REFCLK, Xtal input
45
50
55
%
Output Duty Cycle
DC3
REFCLK, clock input
40
50
60
%
Input Duty Cycle
DCIN
Clock Input, Pin 3
40
50
60
%
Output Rise/Fall Time
tr/f1
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
-
4.80
5.80
ns
Output Rise/Fall Time
tr/f2
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
-
2.60
3.10
ns
Output Rise/Fall Time
tr/f3
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
-
1.80
2.20
ns
Output Rise/Fall Time
tr/f4
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
-
1.40
1.70
ns
Output Rise/Fall Time
tr/f5
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
-
1.10
1.35
ns
Output Rise/Fall Time
tr/f6
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
-
0.90
1.10
ns
Output Rise/Fall Time
tr/f7
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
-
0.70
0.85
ns
Cycle-to-Cycle Jitter
(SSCLK – Pins 4/6/7/8)
CCJ1
FIN=30MHz, all 4 clocks are at
33MHz, +/-2.0% Spread. CL=15pF
-
TBD
ps
Cycle-to-Cycle Jitter
(SSCLK – Pins 4/6/7/8)
CCJ2
FIN=30MHz, all 4 clocks are at
33MHz, +/-2.0% Spread. CL=15pF
-
TBD
ps
Power-down Time
tPD
Time from PD# falling edge to Hi-Z
at outputs (Asynchronous)
-
180
350
ns
Power-up Time
(Crystal or Resonator)
tPU1
Time from PD# rising edge to valid
frequency at outputs
(Asynchronous)
-
3.5
5.0
ms
Power-up Time
(Clock)
tPU2
Time from PD# rising edge to valid
frequency at outputs
(Asynchronous)
-
2.0
3.0
ms
Output Enable Time
tOE
Time from OE falling edge to Hi-Z at
outputs (Asynchronous)
-
180
350
ns
Output Disable Time
tOD
Time from OE falling edge to Hi-Z at
outputs (Asynchronous)
-
180
350
ns
Spread Percent Range
SPR-1
Center Spread, SSCLK-1/2/3/4
+/-0.125
-
+/-2.5
%
Spread Percent Range
SPR-2
Down Spread, SSCLK-1/2/3/4
-5.0
-
-0.25
%
Spread Percent Variation
ΔSS%
Variation of programmed Spread %
-20
-
20
%
Modulation Frequency
FMOD
Programmable, 31.5 kHz standard
30
31.5
120
kHz
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|---|---|
| SL15300ZIT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 1-200MHz 1PLL 2 Out CG/SSCG 3.3-2.5V RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SL15300ZI-XXX | 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:Programmable Spread Spectrum Clock Generator (SSCG) |
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| SL15303EZC | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 1PLL EEPROM Programmable RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SL15303EZCT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 1PLL EEPROM Programmable RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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