參數(shù)資料
型號(hào): SKY72301-22
廠商: Skyworks Solutions Inc
文件頁(yè)數(shù): 7/22頁(yè)
文件大?。?/td> 0K
描述: IC SYNTHESIZER 1GHZ 28-EPTSSOP
產(chǎn)品目錄繪圖: 28-TSSOP
標(biāo)準(zhǔn)包裝: 1
類(lèi)型: 分?jǐn)?shù) N 合成器
PLL:
輸入: 時(shí)鐘,晶體
輸出: 時(shí)鐘,晶體
電路數(shù): 1
比率 - 輸入:輸出: 2:2
差分 - 輸入:輸出: 是/是
頻率 - 最大: 1GHz
除法器/乘法器: 是/無(wú)
電源電壓: 2.7 V ~ 3.3 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 28-SOIC(0.173",4.40mm 寬)裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 28-TSSOP 裸露焊盤(pán)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面: 587 (CN2011-ZH PDF)
其它名稱(chēng): 863-1078-6
DATA SHEET SKY72301-22 FREQUENCY SYNTHESIZER
Care must be taken when attaching this product, whether it is
done manually or in a production solder reflow environment.
Production quantities of this product are shipped in a standard
tape and reel format. For packaging details, refer to the Skyworks
Application Note, Tape and Reel, document number 101568.
Electrical and Mechanical Specifications
The SKY72301-22 is supplied as a 28-pin EP-TSSOP. The
exposed pad is located on the bottom side of the package and
must be connected to ground for proper operation. The exposed
pad should be soldered directly to the circuit board.
Signal pin assignments and functional pin descriptions are
specified in Table 5. The absolute maximum ratings of the
SKY72301-22 are provided in Table 6. The recommended
operating conditions are specified in Table 7 and electrical
specifications are provided in Table 8.
Figure 16 provides a schematic diagram for the SKY72301-22.
Figure 17 shows the package dimensions for the 28-pin
EP-TSSOP and Figure 18 provides the tape and reel dimensions.
Table 5. SKY72301-22 Signal Descriptions (1 of 2)
Pin #
Pin Name
Type
Description
1
Clock
Digital input
Clock signal pin. When CS is low, the register address and data are shifted in address bits first on the
Data pin on the rising edge of Clock.
2
Mod_in
Digital input
Alternate serial modulation data input pin. Address bits are followed by data bits.
3
Mux_out
Digital output
Internal multiplexer output. Selects from oscillator frequency, main or auxiliary reference frequency, main
or auxiliary divided VCO frequency, serial data out, or testability signals. This pin can be tri-stated from
the synthesizer registers.
4
VSUBdigital
Substrate isolation. Connect to ground.
5
GNDecl/cml (Note 1)
Power and ground
Emitter Coupled Logic (ECL)/Current Mode Logic (CML) ground.
6
VCCcml_main
(Note 1)
Power and ground
ECL/CML, 3 V. Removing power safely powers down the associated divider chain and charge pump.
7
Fvco_main
Input
Main VCO differential input.
8
Fvco_main
Input
Main VCO complimentary differential input.
9
LD/PSmain
Analog output
Programmable output pin. Indicates main phase detector out-of-lock as an active low pulsing open
collector output (high impedance when lock is detected), or helps the loop filter steer the main VCO. This
pin is configured using the Phase Detector/Charge Pumps Control Register.
10
VCCcp_main
(Note 1)
Power and ground
Main charge pump supply, 3 to 5 V. Removing power safely powers down the associated divider chain
and charge pump.
11
CPout_main
Analog output
Main charge pump output. The gain of the main charge pump phase detector is controlled by the Phase
Detector/Charge Pumps Control Register.
12
GNDcp_main
(Note 1)
Power and ground
Main charge pump ground.
13
Xtalacgnd/OSC
Ground/input
Reference crystal AC ground or external oscillator differential input.
14
Xtalin/OSC
Input
Reference crystal input or external oscillator differential input.
15
Xtalout/NC
Input
Reference crystal output or no connect.
16
VCCxtal
Power and ground
Crystal oscillator ECL/CML, 3 V.
Skyworks Solutions, Inc. Phone [781] 376-3000 Fax [781] 376-3100 sales@skyworksinc.com www.skyworksinc.com
200706C Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice September 11, 2009
15
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