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參數(shù)資料
| 型號(hào)： | SI5375B-A-GL |
| 廠商： | SILICON LABORATORIES |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 808 MHz, PROC SPECIFIC CLOCK GENERATOR, PBGA80 |
| 封裝： | 10 X 10 MM, ROHS COMPLIANT, PLASTIC, MO-192, BGA-80 |
| 文件頁數(shù)： | 1/52頁 |
| 文件大?。?/td> | 267K |
| 代理商： | SI5375B-A-GL |
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Preliminary Rev. 0.4 5/11
Copyright 2011 by Silicon Laboratories
Si5375
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Si5375
4-PLL A NY-F REQUENCY P RECISION C LOCK
M ULTIPLIER/J ITTER A TTENUATOR
Features
Applications
Description
The Si5375 is a highly integrated, 4-PLL jitter-attenuating precision clock
multiplier for applications requiring sub 1 ps jitter performance. Each of
the DSPLL clock multiplier engines accepts an input clock ranging from
2 kHz to 710 MHz and generates an output clock ranging from 2 kHz to
808 MHz. The device provides virtually any frequency translation
combination across this operating range. For asynchronous, free-running
clock generation applications, the Si5375’s reference oscillator can be
used as a clock source for any of the four DSPLLs. The Si5375 input
clock frequency and clock multiplication ratio are programmable through
an I2C interface. The Si5375 is based on Silicon Laboratories' 3rd-
generation DSPLL technology, which provides any-frequency synthesis
and jitter attenuation in a highly integrated PLL solution that eliminates
the need for external VCXO and loop filter components. Each DSPLL
loop bandwidth is digitally programmable, providing jitter performance
optimization at the application level. The device operates from a single
1.8 or 2.5 V supply with on-chip voltage regulators with excellent PSRR.
The Si5375 is ideal for providing clock multiplication and jitter attenuation
in high port count optical line cards requiring independent timing domains.
Highly integrated, 4–PLL clock
multiplier/jitter attenuator
Four independent DSPLLs support
any-frequency synthesis and jitter
attenuation
Four inputs/four outputs
Each DSPLL can generate any
frequency from 2 kHz to 808 MHz
from a 2 kHz to 710 MHz input
Ultra-low jitter clock outputs: 410 fs
rms (12 kHz– 20 MHz), 440 fs rms
(50 kHz–80 MHz)
Meets ITU-T G.8251 and Telcordia
GR-253-CORE OC-192 jitter
specifications
Integrated loop filter with
programmable bandwidth as low as
60 Hz
Simultaneous free-run and
synchronous operation
Automatic/manual hitless input clock
switching
Selectable output clock signal format
(LVPECL, LVDS, CML, CMOS)
LOL and interrupt alarm outputs
I2C programmable
Single 1.8 V ±5% or 2.5 V ±10%
operation with high PSRR on-chip
voltage regulator
10x10 mm PBGA
High density any-port, any-protocol,
any-frequency line cards
ITU-T G.709 OTN custom FEC
10/40/100G
OC-48/192, STM-16/64
1/2/4/8/10G Fibre Channel
GbE/10GbE Synchronous Ethernet
Carrier Ethernet, multi-service
switches and routers
MSPP, ROADM, P-OTS,
muxponders
Ordering Information:
See page 46.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| Si5375-EVB | 功能描述:時(shí)鐘和定時(shí)器開發(fā)工具 QUAD DSPLL 4IN/4OUT CLOCK EVAL KIT RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評(píng)估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| SI5376B-A-BL | 制造商:Silicon Laboratories Inc 功能描述:QUAD DSPLL JITTER ATTENUATING CLOCK, - Trays 制造商:Silicon Laboratories Inc 功能描述:IC CLK GEN/JITTER ATTEN 80PBGA |
| SI5376B-A-GL | 制造商:Silicon Laboratories Inc 功能描述:QUAD DSPLL JITTER ATTENUATING CLOCK, - Trays 制造商:Silicon Laboratories Inc 功能描述:IC CLK GEN/JITTER ATTEN 80PBGA 制造商:Silicon Laboratories Inc 功能描述:Phase Locked Loops - PLL QuadDSPLL 8 In/Outpt (2 kHz-808 MHz) |
| SI5380A-B-GM | 功能描述:IC CLOCK GEN TO 1.47456GHZ 64QFN 制造商:silicon labs 系列:- 包裝:托盤 零件狀態(tài):有效 類型:* PLL:是 輸入:LVCMOS，LVDS，LVPECL，晶體 輸出:CML，LVCMOS，LVDS，LVPECL 電路數(shù):1 比率 - 輸入:輸出:5:12 差分 - 輸入:輸出:是/是 頻率 - 最大值:1.47GHz 分頻器/倍頻器:是/無 電壓 - 電源:1.71 V ~ 3.47 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-VFQFN 裸露焊盤 供應(yīng)商器件封裝:64-QFN（9x9） 標(biāo)準(zhǔn)包裝:260 |
| SI5380A-D-GM | 功能描述:BASE/BLANK PROTOTYPING DEVICE:UL 制造商:silicon labs 系列:- 包裝:托盤 零件狀態(tài):新產(chǎn)品 類型:* PLL:是 輸入:LVCMOS，LVDS，LVPECL，晶體 輸出:CML，LVCMOS，LVDS，LVPECL 電路數(shù):1 比率 - 輸入:輸出:5:12 差分 - 輸入:輸出:是/是 頻率 - 最大值:1.47GHz 分頻器/倍頻器:是/無 電壓 - 電源:1.71 V ~ 3.47 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-VFQFN 裸露焊盤 供應(yīng)商器件封裝:64-QFN（9x9） 標(biāo)準(zhǔn)包裝:260 |
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