參數(shù)資料
型號： SI5369B-C-GQR
廠商： SILICON LABORATORIES
元件分類： 時鐘產(chǎn)生/分配
英文描述： 808 MHz, PROC SPECIFIC CLOCK GENERATOR, PQFP100
封裝： 14 X 14 MM, ROHS COMPLIANT, MS-026AED-HD, TQFP-100
文件頁數(shù)： 1/84頁
文件大?。?/td> 870K
代理商： SI5369B-C-GQR
Preliminary Rev. 0.4 5/11
Copyright 2011 by Silicon Laboratories
Si5369
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Si5369
A NY-F REQUENCY P RECISION C LOCK M ULTIPLIER/J ITTER
A TTENUATOR
Features
Applications
Description
The Si5369 is a jitter-attenuating precision clock multiplier for applications
requiring sub 1 ps rms jitter performance. The Si5369 accepts four clock inputs
ranging from 2 kHz to 710 MHz and generates five clock outputs ranging from
2 kHz to 945 MHz and select frequencies to 1.4 GHz. The device provides
virtually any frequency translation combination across this operating range. The
outputs are divided down separately from a common source. The Si5369 input
clock frequency and clock multiplication ratio are programmable through an I2C or
SPI interface. The Si5369 is based on Silicon Laboratories' third-generation
DSPLL technology, which provides any-frequency synthesis and jitter
attenuation in a highly integrated PLL solution that eliminates the need for
external VCXO and loop filter components. The DSPLL loop bandwidth is digitally
programmable, providing jitter performance optimization at the application level.
Operating from a single 1.8, 2.5 ,or 3.3 V supply, the Si5369 is ideal for providing
clock multiplication and jitter attenuation in high performance timing applications.
Generates any frequency from 2 kHz
to 945 MHz and select frequencies to
1.4 GHz from an input frequency of
2 kHz to 710 MHz
Ultra-low jitter clock outputs with jitter
generation as low as 300 fs rms
(50 kHz–80 MHz)
Integrated loop filter with selectable
loop bandwidth (60 Hz to 8.4 kHz)
Meets OC-192 GR-253-CORE jitter
specifications
Four clock inputs with manual or
automatically controlled hitless
switching and phase build-out
Supports holdover and freerun
modes of operation
SONET frame sync switching and
regeneration
Five clock outputs with selectable
signal format (LVPECL, LVDS, CML,
CMOS)
Support for ITU G.709 and custom
FEC ratios (253/226, 239/237,
255/238, 255/237, 255/236)
LOL, LOS, FOS alarm outputs
Digitally-controlled output phase
adjust
I2C or SPI programmable settings
On-chip voltage regulator for 1.8 V
±5%, 2.5 V ±10%, or 3.3 V ±10%
operation
Small size: 14 x 14 mm 100-pin
TQFP
Pb-free, RoHS compliant
SONET/SDH OC-48/STM-16/OC-
192/STM-64 line cards
GbE/10GbE, 1/2/4/8/10G FC line cards
ITU G.709 and custom FEC line cards
Wireless repeaters/wireless backhaul
Data converter clocking
OTN/WDM Muxponder, MSPP,
ROADM line cards
SONET/SDH + PDH clock
synthesis
Test and measurement
Synchronous Ethernet
Broadcast video
Ordering Information:
Pin Assignments
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
31
30
29
28
27
26
32
64
61
62
63
57
58
59
60
50
51
52
53
54
55
56
49
NC
GND
C2B
GND
C1B
C3B
XA
XB
VDD
CK
IN
3+
CK
IN
3–
RA
T
E
0
CK
IN
1+
CK
IN
1–
CK
IN
2+
CK
IN
2–
RA
T
E
1
CK
IN
4+
CK
IN
4–
LO
L
SDI
NC
A1
A0
GND
VDD
SDA_SDO
SCL
C2A
C1A
CS1_C4A
NC
GND
CK
O
U
T
3+
CM
O
D
E
CK
O
U
T
3–
NC
CK
O
U
T
1+
CK
O
U
T
1–
FS
_
O
U
T
+
FS
_
O
U
T
–
VD
D
CK
O
U
T
2+
CK
O
U
T
2–
NC
CK
O
U
T
4+
NC
CK
O
U
T
4–
17
20
19
18
24
23
22
21
25
74
73
72
71
70
69
68
67
66
65
75
100
89
90
91
92
93
94
95
96
97
98
99
76
77
78
79
80
81
82
83
84
85
86
87
88
RST
NC
VDD
GND
CS0_C3A
GND
NC
GN
D
VD
D
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
VDD
A2_SS
GND
NC
VD
D
VD
D
VD
D
VD
D
VD
D
VD
D
VD
D
VD
D
VD
D
VD
D
NC
VDD
NC
Si5369
GND PAD
INT_ALM
相關(guān)PDF資料
PDF描述
SI5369B-C-GQ 808 MHz, PROC SPECIFIC CLOCK GENERATOR, PQFP100
SI5369C-C-GQ 346 MHz, PROC SPECIFIC CLOCK GENERATOR, PQFP100
SI5369D-C-GQ 243 MHz, PROC SPECIFIC CLOCK GENERATOR, PQFP100
SI5369D-C-GQR 243 MHz, PROC SPECIFIC CLOCK GENERATOR, PQFP100
SI5374B-A-GL 808 MHz, PROC SPECIFIC CLOCK GENERATOR, PBGA80
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
Si5369C-C-GQ 功能描述:時鐘發(fā)生器及支持產(chǎn)品 LW LOOP BW AR CLK MULT/JITTER 4IN 5OUT RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
SI5369C-C-GQR 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Lo Loop BW Clk Multi Jitter Attn 4In/5Out RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
Si5369D-C-GQ 功能描述:時鐘發(fā)生器及支持產(chǎn)品 LW LOOP BW AR CLK MULT/JITTER 4IN 5OUT RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
SI5369D-C-GQR 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Lo Loop BW Clk Multi Jitter Attn 4In/5Out RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
Si5369-EVB 功能描述:時鐘和定時器開發(fā)工具 SI5369 DEV KIT RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V
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