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參數(shù)資料
| 型號： | SI5322-C-GM |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 7/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PREC CLOCK MULTIPLIER 36-QFN |
| 標(biāo)準(zhǔn)包裝： | 490 |
| 系列： | DSPLL® |
| 類型： | 時(shí)鐘乘法器 |
| PLL： | 是 |
| 輸入： | 時(shí)鐘 |
| 輸出： | CML，CMOS，LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:2 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 1.05GHz |
| 除法器/乘法器： | 無/是 |
| 電源電壓： | 1.71 V ~ 3.63 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 36-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 36-QFN（6x6） |
| 包裝： | 托盤 |
Si5322
Rev. 0.51
15
5, 10, 11,
15, 32
VDD
Supply
Supply.
The device operates from a 1.8, 2.5, or 3.3 V supply. Bypass
capacitors should be associated with the following VDD pins:
5
0.1 F
10
0.1 F
32
0.1 F
A 1.0 F should be placed as close to device as is practical.
6, 8,19,
20, 31
GND
Supply
Ground.
Must be connected to system ground. Minimize the ground
path impedance for optimal performance of this device.
9
AUTOSEL
I
3-Level
Manual/Automatic Clock Selection.
Three level input that selects the method of input clock
selection to be used.
L = Manual.
M = Automatic non-revertive.
H = Automatic revertive.
The pin has a weak pull-up and weak pull-down and
defaults to M.
Some designs may require an external resistor voltage
divider when driven by an active device that will tri-state.
12
13
CKIN2+
CKIN2–
IMulti
Clock Input 2.
Differential input clock. This input can also be driven with a
single-ended signal. Input frequency selected from a table
of values. The same frequency must be applied to CKIN1
and CKIN2.
14
DBL2_BY
I
3-Level
Output 2 Disable/Bypass Mode Control.
Controls enable of CKOUT2 divider/output buffer path and
PLL bypass mode.
L = CKOUT2 enabled.
M = CKOUT2 disabled.
H = Bypass mode with CKOUT2 enabled.
CMOS outputs do not support Bypass Mode.
The pin has a weak pull-up and weak pull-down and
defaults to M.
Some designs may require an external resistor voltage
divider when driven by an active device that will tri-state.
16
17
CKIN1+
CKIN1–
IMulti
Clock Input 1.
Differential input clock. This input can also be driven with a
single-ended signal. Input frequency selected from a table
of values. The same frequency must be applied to CKIN1
and CKIN2.
Table 9. Si5322 Pin Descriptions (Continued)
Pin #
Pin Name
I/O
Signal Level
Description
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SI5322-C-GMR | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Pin-Ctrl Precision Clk Xplier 2/2 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SI5323 | 制造商:SILABS 制造商全稱:SILABS 功能描述:Pin-Controlled 1_710 MHz Jitter Cleaning Clock |
| Si5323-B-GM | 功能描述:鎖相環(huán) - PLL PIN-PROGRAMMABLE CLK MULT / JITTER ATTEN RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| SI5323-B-GMR | 制造商:Silicon Laboratories Inc 功能描述:PIN-PROGRAMMABLE PRECISION CLOCK MULTIPLIER/JITTER ATTENUATO - Tape and Reel |
| Si5323-C-GM | 功能描述:鎖相環(huán) - PLL PIN-PROGRAMMABLE CLK MULT / JITTER ATTEN RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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