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參數(shù)資料
| 型號： | SI5322-B-GM |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 8/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PREC CLOCK MULTIPLIER 36QFN |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 系列： | DSPLL® |
| 類型： | 時鐘乘法器 |
| PLL： | 是 |
| 輸入： | 時鐘 |
| 輸出： | CML，CMOS，LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:2 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 1.05GHz |
| 除法器/乘法器： | 無/是 |
| 電源電壓： | 1.71 V ~ 3.63 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 36-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 36-QFN（6x6） |
| 包裝： | 管件 |
Si5322
16
Rev. 0.51
21
CS_CA
I/O
LVCMOS
Input Clock Select/Active Clock Indicator.
Input: If manual clock selection mode is chosen
(AUTOSEL = L), this pin functions as the manual
input clock selector. This input is internally deglitched
to prevent inadvertent clock switching during
changes in the CS input state.
0 = Select CKIN1.
1 = Select CKIN2.
If configured as input, must be set high or low.
Output: If automatic clock selection mode is chosen
(AUTOSEL = M or H), this pin indicates which of
the two input clocks is currently the active clock. If
alarms exist on both CKIN1 and CKIN2, indicating
that the digital hold state has been entered, CA will
indicate the last active clock that was used before
entering the hold state.
0 = CKIN1 active input clock.
1 = CKIN2 active input clock.
23
22
BWSEL1
BWSEL0
I
3-Level
Bandwidth Select.
Three level inputs that select the DSPLL closed loop band-
width. Detailed operations and timing characteristics for
these pins may be found in the Any-Frequency Precision
Clock Family Reference Manual.
These pins have both weak pull-ups and weak pull-downs
and default to M.
Some designs may require an external resistor voltage
divider when driven by an active device that will tri-state.
27
26
25
24
FRQSEL3
FRQSEL2
FRQSEL1
FRQSEL0
I
3-Level
Multiplier Select.
Three level inputs that select the input clock and clock multi-
plication ratio, depending on the FRQTBL setting. Consult
the Any-Frequency Precision Clock Family Reference Man-
ual or DSPLLsim configuration software for settings, both
available for download at www.silabs.com/timing (click on
Documentation).
These pins have both weak pull-ups and weak pull-downs
and default to M.
Some designs may require an external resistor voltage
divider when driven by an active device that will tri-state.
Table 9. Si5322 Pin Descriptions (Continued)
Pin #
Pin Name
I/O
Signal Level
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SI5323-B-GM | IC MULTIPLIER/ATTENUATOR 36QFN |
| SI5325A-C-GM | IC UP-PROG CLK MULTIPLIER 36-QFN |
| SI5326A-C-GM | IC ANY-RATE MULTI/ATTEN 36-QFN |
| SI5330J-A00223-GM | IC CLK BUFFER TRANSLA 1:8 24-QFN |
| SI5338G-A-GM | IC CLK GEN I2C BUS PROG 24QFN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SI5322-B-GMR | 制造商:Silicon Laboratories Inc 功能描述:PIN-PROGRAMMABLE PRECISION CLOCK MULTIPLIER, 2 OUTPUTS - Tape and Reel |
| Si5322-C-GM | 功能描述:時鐘合成器/抖動清除器 PIN-PROGRAMMABLE CLK MULTIPLIER 1 OUT RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SI5322-C-GMR | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Pin-Ctrl Precision Clk Xplier 2/2 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SI5323 | 制造商:SILABS 制造商全稱:SILABS 功能描述:Pin-Controlled 1_710 MHz Jitter Cleaning Clock |
| Si5323-B-GM | 功能描述:鎖相環(huán) - PLL PIN-PROGRAMMABLE CLK MULT / JITTER ATTEN RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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