參數(shù)資料
型號： SI3210M-BT
廠商： Silicon Laboratories Inc
文件頁數(shù)： 29/148頁
文件大小： 0K
描述： IC SLIC/CODEC PROG 38TSSOP
標準包裝： 50
系列： ProSLIC®
功能： 用戶線路接口概念（SLIC），CODEC
接口： PCM，SPI
電路數(shù)： 1
電源電壓： 3.3V，5V
電流 - 電源： 88mA
功率（瓦特）： 700mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 38-TFSOP（0.173"，4.40mm 寬）
供應商設備封裝： 38-TSSOP
包裝： 管件
包括： BORSCHT 功能，DTMF 生成和解碼，F(xiàn)SK 生成，脈沖測量生成，語音回送測試模式
Si3210/Si3211
124
Rev. 1.61
Not
Recommended
fo
r N
ew
D
esi
gn
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Table 44. SLIC Control Indirect Registers Description
Addr.
Description
Reference
Page
28
Loop Closure Threshold.
Loop closure detection threshold. This register defines the upper bounds threshold if hys-
teresis is enabled (direct Register 108, bit 0). The range is 0–80 mA in 1.27 mA steps.
29
Ring Trip Threshold.
Ring trip detection threshold during ringing.
30
Common Mode Minimum Threshold for Speed-Up.
This register defines the negative common mode voltage threshold. Exceeding this
threshold enables a wider bandwidth of dc linefeed control for faster settling times. The
range is 0–23.625 V in 0.375 V steps.
31
Common Mode Maximum Threshold for Speed-Up.
This register defines the positive common mode voltage threshold. Exceeding this
threshold enables a wider bandwidth of dc linefeed control for faster settling times. The
range is 0–23.625 V in 0.375 V steps.
32
Power Alarm Threshold for Transistors Q1 and Q2.
33
Power Alarm Threshold for Transistors Q3 and Q4.
34
Power Alarm Threshold for Transistors Q5 and Q6.
35
Loop Closure Filter Coefficient.
36
Ring Trip Filter Coefficient.
37
Thermal Low Pass Filter Pole for Transistors Q1 and Q2.
38
Thermal Low Pass Filter Pole for Transistors Q3 and Q4.
39
Thermal Low Pass Filter Pole for Transistors Q5 and Q6.
40
Common Mode Bias Adjust During Ringing.
Recommended value of 0 decimal.
41
DC-DC Converter VOV Voltage (Si3210 only).
This register sets the overhead voltage, VOV, to be supplied by the dc-dc converter.
When the VOV bit = 0 (direct Register 66, bit 4), VOV should be set between 0 and 9 V
(VMIND = 0 to 6h). When the VOV bit = 1, VOV should be set between 0 and 13.5 V
(VMIND = 0 to 9h).
42
Reserved.
43
Loop Closure Threshold—Lower Bound.
This register defines the lower threshold for loop closure hysteresis, which is enabled in
bit 0 of direct Register 108. The range is 0–80 mA in 1.27 mA steps.
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