參數(shù)資料
型號(hào)： SH7729
廠商： Hitachi,Ltd.
英文描述： Hitachi Microcomputer Development Environment System
中文描述： 日立單片機(jī)開發(fā)環(huán)境系統(tǒng)
文件頁(yè)數(shù)： 228/241頁(yè)
文件大?。?/td> 1562K
代理商： SH7729
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Rev. 2.0, 01/01, page 204 of 216
6.5.4
Notes on Using the JTAG Clock (TCK) and AUD Clock (AUDCK)
1. When JTAG clock (TCK) is used, set the JTAG clock (TCK) frequency to lower than the
frequency of half of the CPU clock.
2. When the AUD clock (AUDCK) is used, set the AUD clock (AUDCK) within the range
between the quarter of the CPU clock and the CPU clock (60 MHz).
6.5.5
Notes on Setting the [Breakpoint] Dialog Box
1. When an odd address is set, the address is rounded down to an even address.
2. A BREAKPOINT is accomplished by replacing instructions. Accordingly, it can be set only
to the RAM area. However, a BREAKPOINT cannot be set to the following addresses:
An area other than the CS0 to 6 areas and the internal RAM area
An instruction in which Break Condition 2 is satisfied
A slot instruction of a delayed branch instruction
An area that can be only read by MMU
3. During step execution, a BREAKPOINT is disabled.
4. Condition set at Break Condition 2 are disabled when an instruction to which a
BREAKPOINT has been set is executed. Do not set a BREAKPOINT to an instruction in
which Break Condition 2 is satisfied.
5. When execution resumes from the breakpoint address after the program execution stops at the
breakpoint, single-step execution is performed at the address before execution resumes.
Therefore, realtime operation cannot be performed.
6. When a BREAKPOINT is set to the slot instruction of a delayed branch instruction, the PC
value becomes an illegal value. Accordingly, do not set a BREAKPOINT to the slot
instruction of a delayed branch instruction.
7. When the [Normal] option is selected in the [Memory area] group box in the [General] page of
the [Configuration] dialog box, a breakpoint is set to a physical address or a virtual address
according to the SH7729 or SH7709A MMU status during command input when the
VPMAP_SET command setting is disabled. The ASID value of the SH7729 or SH7709A
PTEH register during command input is used. When VPMAP_SET command setting is
enabled, a breakpoint is set to a physical address into which address translation is made
according to the VP_MAP table. However, for addresses out of the range of the VP_MAP
table, the address to which a breakpoint is set depends on the SH7729 or SH7709A MMU
status during command input. Even when the VP_MAP table is modified after breakpoint
setting, the address translated when the breakpoint is set valid.
相關(guān)PDF資料
PDF描述
SH7750R SuperH RISC engine
SH7750S SuperH RISC engine
SH7750 SuperH RISC Processor Product Brief
SH7750 Hitachi Microcomputer Development Environment System SH7750 E10A Emulator
SH7750E10A Hitachi Microcomputer Development Environment System SH7750 E10A Emulator
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SH7729R 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
SH7750 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:SuperH RISC Processor Product Brief
SH7750E10A 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:Hitachi Microcomputer Development Environment System SH7750 E10A Emulator
SH7751 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SuperH RISC engine
SH7751R 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SuperH RISC engine
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