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參數(shù)資料
| 型號： | SG6932SZ |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 919K |
| 描述： | IC PFC CONTROLLER CCM 16SOP |
| 標準包裝： | 2,500 |
| 模式： | 連續(xù)導電（CCM） |
| 頻率 - 開關(guān)： | 65kHz |
| 電流 - 啟動： | 10µA |
| 電源電壓： | 14 V ~ 20 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
?2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
SG6932 " Rev. 1.1.3
5
Pin Definitions
Pin # Name Description
1
VRMS
Line-Voltage Detection. The pin is used for PFC multiplier and brownout protection.
2
RI
Oscillator Setting. One resistor connected between RI and ground determines the switching
frequency. A resistor with resistance between 12 ~ 47k& is recommended. The switching
frequency is equal to [1560 / R
I
]kHz, where R
I
is in k? For example, if R
I
is 24k? the
switching frequency is 65kHz.
3
IEA
Output of PFC Current Amplifier. The signal from this pin is compared with an internal
sawtooth to determine the pulsewidth for PFC gate drive.
4
IPFC
Inverting Input of PFC Current Amplifier. Proper external compensation circuits result in
excellent input power factor via average-current-mode control.
5
IMP
Non-inverting Input of PFC Current Amplifier and Output of Multiplier. Proper external
compensation circuits result in excellent input power factor via average-current-mode control.
6
ISENSE Peak Current Limit Setting for PFC.
7
FBPWM
PWM Feedback Input. The control input for voltage-loop feedback of PWM stage. It is
internally pulled HIGH through a 6.5k?resistor. An external opto-coupler from the secondary
feedback circuit is usually connected to this pin.
8
IPWM
PWM Current Sense. The current sense input for the PWM stage. Via a current sense
resistor, this pin provides the control input for peak-current-mode control and cycle-by-cycle
current limiting.
9
OPWM
PWM Gate Drive. The totem-pole output drive for PWM MOSFET. This pin is internally
clamped under 18V to protect the MOSFET.
10
GND
Ground. The power ground.
11
OPFC
PFC Gate Drive. The totem-pole output drive for the PFC MOSFET. This pin is internally
clamped under 18V to protect the MOSFET.
12
VDD
Supply. The power supply pin. The threshold voltages for start-up and turn-off are 14V and
10V, respectively. The operating current is lower than 10mA.
13
SS
PWM Soft-Start. During startup, the SS pin charges an external capacitor with a 50?/SPAN>A
constant current source. The voltage on FBPWM is clamped by SS during startup. In the event
of a protection condition occurring and/or PWM being disabled, the SS pin is quickly
discharged. The voltage of SS pin can be used to select 50% or 65% maximum duty cycle.
14
FBPFC
Voltage Feedback Input for PFC. The feedback input for PFC voltage loop. The inverting
input of PFC error amplifier. This pin is connected to the PFC output through a divider network.
15
VEA
Error Amplifier Output for PFC Voltage Feedback Loop. A compensation network (usually a
capacitor) is connected between this pin and ground. A large capacitor value results in a
narrow bandwidth and improves the power factor.
16
IAC
Input AC Current. For normal operation, this input is used to provide current reference for the
multiplier. The suggested maximum IAC is 360礎(chǔ).
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