參數(shù)資料
型號(hào)： SG6902SZ
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： 穩(wěn)壓器
英文描述： Green-Mode PFC / Flyback-PWM Controller
中文描述： POWER FACTOR CONTROLLER, 68 kHz SWITCHING FREQ-MAX, PDSO20
封裝： 0.300 INCH, ROHS COMPLIANT, MS-013AC, SOP-20
文件頁(yè)數(shù)： 15/22頁(yè)
文件大?。?/td> 863K
代理商： SG6902SZ
Product Specification
Green-Mode PFC / Flyback-PWM Controller
SG6902
System General Corp.
Version 1.3.1 (IAO33.0022.B3)
- 15 -
www.sg.com.tw www.fairchildsemi.com
September, 2007
Line-Voltage Detection (VRMS)
Figure 2 shows a resistive divider with low-pass filtering
for line-voltage detection on the VRMS pin. The V
RMS
voltage is used for the PFC multiplier, brownout
protection, and range control.
For brownout protection, the SG6902 is disabled with
195ms delay time if the voltage V
RMS
drops below 0.8V.
For PFC multiplier and range control, refer to the sections
below for details.
FIG.2 Line-Voltage Detection Circuit
PFC Output Voltage Control (RANGE)
For a universal input (90V
AC
~ 264V
AC
) power supplies
applying active boost PFC and flyback as a second stage,
the output voltage of PFC is usually designed around
250V at low line and 390V at high line. This is to improve
efficiency at low-line input. In SG6902, the RANGE pin
(open-drain structure) is used for the two-level output
voltage setting.
Figure 3 shows the RANGE output that programs the PFC
output voltage. The RANGE output is shorted to ground if
the V
RMS
voltage exceeds 1.95V while high impedance
(open) and the V
RMS
voltage drops below 1.6V. The
output voltages can be designed using below equations:
(
)
(
)
V
3
R
//
R
R
//
R
R
V
Ground
Range
V
3
R
R
R
V
Open
Range
C
B
C
B
A
O
B
B
A
O
×
+
=
=
×
+
=
=
---- (3)
FIG.3 Range Control Two-Level Output Voltage
Interleave Switching and Green-Mode
Operation
The SG6902 uses interleaved switching to synchronize
the PFC and flyback stages, which reduces switching
noise and spreads the EMI emissions. Figure 4 shows
off-time, T
OFF
, inserted between the turn-off of the PFC
gate drive and the turn-on of the PWM.
The off-time T
OFF
is increased in response to the
decreasing of the voltage level of FBPWM. Therefore, the
PWM switching frequency is continuously decreased to
reduce switching losses. To further reduce power losses
under extra light-load conditions, the PFC stage is turned
off with a 650ms delay time.
FIG.4 Interleaved Switching Pattern
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